OSVVM in Xilinx Vivado giving erros

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This topic has 2 voices, contains 2 replies, and was last updated by Avatar of bansal bansal 74 days ago.

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April 11, 2017 at 13:27 #1330
Avatar of bansal
bansal

I am getting the following errors when trying to compile the OSVVM library with the Xilinx Vivado simulator, can you please help or please point to a free simulator which I can use to write or try out osvvm based tests. My company is a research based company and relies mostly on opensource tools, for professional ones we have to make a strong case based on projects to be able to use those–

INFO: [SIM-utils-51] Simulation object is ‘sim_1′
INFO: [USF-XSim-37] Inspecting design source files for ‘OSVVM_tb’ in fileset ‘sim_1′…
INFO: [USF-XSim-97] Finding global include files…
INFO: [USF-XSim-100] Fetching design files from ‘sources_1′…(this may take a while)…
INFO: [USF-XSim-101] Fetching design files from ‘sim_1′…
INFO: [USF-XSim-2] XSim::Compile design
INFO: [USF-XSim-61] Executing ‘COMPILE and ANALYZE’ step in ‘C:/Users/abansal/osvmm_example_adder/osvmm_example_adder.sim/sim_1/behav’
“xvhdl -m64 –relax -prj OSVVM_tb_vhdl.prj”
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/osvmm_example_adder/osvmm_example_adder.srcs/sources_1/new/design.vhd” into library xil_defaultlib
INFO: [VRFC 10-307] analyzing entity adder0
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/osvmm_example_adder/osvmm_example_adder.srcs/sources_1/new/adder1.vhd” into library xil_defaultlib
INFO: [VRFC 10-307] analyzing entity adder1
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/NamePkg.vhd” into library OSVVM
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/OsvvmGlobalPkg.vhd” into library OSVVM
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/TranscriptPkg.vhd” into library OSVVM
ERROR: [VRFC 10-91] tee is not declared [C:/Users/abansal/Downloads/TranscriptPkg.vhd:165]
ERROR: [VRFC 10-1504] unit transcriptpkg ignored due to previous errors [C:/Users/abansal/Downloads/TranscriptPkg.vhd:79]
INFO: [VRFC 10-240] VHDL file C:/Users/abansal/Downloads/TranscriptPkg.vhd ignored due to errors
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/AlertLogPkg.vhd” into library OSVVM
ERROR: [VRFC 10-1074] near reportalerts ; 2 visible identifiers match here [C:/Users/abansal/Downloads/AlertLogPkg.vhd:493]
ERROR: [VRFC 10-1504] unit alertlogpkg ignored due to previous errors [C:/Users/abansal/Downloads/AlertLogPkg.vhd:259]
INFO: [VRFC 10-240] VHDL file C:/Users/abansal/Downloads/AlertLogPkg.vhd ignored due to errors
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/AlertLogPkg_body_BVUL.vhd” into library OSVVM
ERROR: [VRFC 10-1402] subprogram alertif does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:95]
ERROR: [VRFC 10-1402] subprogram alertif does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:97]
ERROR: [VRFC 10-1402] subprogram alertifnot does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:106]
ERROR: [VRFC 10-1402] subprogram alertifnot does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:108]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:117]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:118]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:119]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:120]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:121]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:122]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:123]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:124]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:126]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:127]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:128]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:129]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:130]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:131]
ERROR: [VRFC 10-1402] subprogram alertifequal does not have a body [C:/Users/abansal/Downloads/AlertLogPkg.vhd:132]
INFO: [#UNDEF] Sorry, too many errors..
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/RandomBasePkg.vhd” into library OSVVM
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/SortListPkg_int.vhd” into library OSVVM
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/RandomPkg.vhd” into library OSVVM
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/MessagePkg.vhd” into library OSVVM
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/CoveragePkg.vhd” into library OSVVM
ERROR: [VRFC 10-837] illegal named association in array index [C:/Users/abansal/Downloads/CoveragePkg.vhd:2786]
ERROR: [VRFC 10-837] illegal named association in array index [C:/Users/abansal/Downloads/CoveragePkg.vhd:2797]
ERROR: [VRFC 10-837] illegal named association in array index [C:/Users/abansal/Downloads/CoveragePkg.vhd:2808]
ERROR: [VRFC 10-837] illegal named association in array index [C:/Users/abansal/Downloads/CoveragePkg.vhd:2873]
ERROR: [VRFC 10-1504] unit coveragepkg ignored due to previous errors [C:/Users/abansal/Downloads/CoveragePkg.vhd:743]
INFO: [VRFC 10-240] VHDL file C:/Users/abansal/Downloads/CoveragePkg.vhd ignored due to errors
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/Downloads/OsvvmContext.vhd” into library OSVVM
INFO: [VRFC 10-163] Analyzing VHDL file “C:/Users/abansal/osvmm_example_adder/osvmm_example_adder.srcs/sim_1/new/testbench.vhd” into library xil_defaultlib
INFO: [VRFC 10-307] analyzing entity OSVVM_tb
ERROR: [XSIM 43-3294] Signal EXCEPTION_ACCESS_VIOLATION received.
Printing stacktrace…

April 11, 2017 at 14:11 #1331
Avatar of Jim Lewis
Jim Lewis

Hi

OSVVM requires a simulator to support a VHDL-2002 feature called protected types.   It also requires some VHDL-2008 support.    Did you turn on the VHDL-2008 switch?  If you did, make sure to file a bug report with Xilinx.

For a free simulator that does support OSVVM, you can use the Aldec tools that come with lattice, ModelSim that comes with Altera or MicroSemi, or GHDL.

Best Regards,

Jim

April 12, 2017 at 07:18 #1332
Avatar of bansal
bansal

*Thanks. In Xilinx I had selected all the files as VHDL2008 files. It doesn’t seem to support the full VHDL2008 features– for eg, I got an error tee not declared in

      tee(TranscriptFile, buf) ;

however I see use std.textio.all library being included.  I am not sure if I should enable some other switch or not.  I will post on Xilinx forum as well. 

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