Open Source VHDL Verification Methodology | Dirk | Activity https://osvvm.org/members/dirk-adams/activity Activity feed for Dirk. Fri, 11 Sep 2026 15:38:30 +0100 https://buddypress.org/?v= en-US 30 hourly 2 031cd673e32569537eb9423cf720fe40 Dirk replied to the topic Memory leak or not ? in the forum VHDL https://osvvm.org/forums/topic/memory-leak-or-not#post-2105 Sun, 27 Nov 2022 08:11:56 +0000 Hi Jim,
Thank you for your elaborate (and much appreciated) reply.
It is very useful and confirms what I feared being the case: that this is in fact a memory leak…
The first solution you suggest was actually already on my mind as a working alternative (without the memory leak). But this approach has the side-effect that an additional ‘copy…[Read more]

]]> 0 78e1ba788b36ac1585b4a0dfc7dada7c Dirk started the topic Memory leak or not ? in the forum VHDL https://osvvm.org/forums/topic/memory-leak-or-not Tue, 22 Nov 2022 11:18:46 +0000 I have a question about implementation of access type objects in VHDL.
Suppose I have a not fully constrained type, for example:

type t_my_type is array(natural range<>, natural range <>) of integer;

Now suppose I want to write a function that transforms an object of this type (possibly changing the array dimensions), for example:

function…[Read more]

]]> 0 20be93c3ffe8196b596d0fc6aadfc879 Dirk became a registered member https://osvvm.org/activity/p/5952 Fri, 28 Aug 2020 08:02:11 +0100 0