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	<title>Open Source VHDL Verification Methodology | Jason | Activity</title>
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				<title>Jason replied to the topic Barrier synchronization with integer_barrier in the forum OSVVM</title>
				<link>https://osvvm.org/forums/topic/barrier-synchronization-with-integer_barrier#post-2211</link>
				<pubDate>Tue, 30 May 2023 12:49:17 +0100</pubDate>

									<content:encoded><![CDATA[<p>Thank you for this detailed response &#8211; very informative.</p>
<p>I found the TestDone signal in my simulator (was looking for it in the wrong part of the hierarchy) and it behaves as expected. FYI I am only using SetDebugMode and did not need to use SetInteractiveMode.</p>
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				<title>Jason started the topic Barrier synchronization with integer_barrier in the forum OSVVM</title>
				<link>https://osvvm.org/forums/topic/barrier-synchronization-with-integer_barrier</link>
				<pubDate>Tue, 30 May 2023 01:54:49 +0100</pubDate>

									<content:encoded><![CDATA[<p>I want to make sure I understand what is going on &#8220;under the hood&#8221; when using integer_barrier type barrier sync signal (as is done in the AXI4 testbenches). From what I have gleaned from reading &#8220;VHDL-2008 Just the New Stuff&#8221;, the simulator will automagically create an array of integers to pass into the resolution function resolved_barrier because&hellip;<span class="activity-read-more" id="activity-read-more-9722"><a href="https://osvvm.org/forums/topic/barrier-synchronization-with-integer_barrier" rel="nofollow ugc">[Read more]</a></span></p>
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				<title>Jason became a registered member</title>
				<link>https://osvvm.org/activity/p/9711</link>
				<pubDate>Tue, 23 May 2023 17:53:08 +0100</pubDate>

				
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