Open Source VHDL Verification Methodology | Joseph | Activity https://osvvm.org/members/justinbieber/activity Activity feed for Joseph. Tue, 20 Oct 2026 20:26:57 +0100 https://buddypress.org/?v= en-US 30 hourly 2 ef4b849c5566a56c36be538b657dd9c7 Joseph replied to the topic Alert ERROR in Default in the forum OSVVM https://osvvm.org/forums/topic/alert-error-in-default#post-2353 Mon, 11 Mar 2024 21:54:00 +0000 Thanks for the info Jim! I was dealing with some unusual sizes for logic vectors. So, I just resized them in my VC to have a bigger width to capture all of the data since I actually wanted to capture all of the data bits, not just some of them. I now don’t get this error anymore.

]]> 0 1908fecc4fbf765342887b7a6837165f Joseph started the topic Alert ERROR in Default in the forum OSVVM https://osvvm.org/forums/topic/alert-error-in-default Fri, 08 Mar 2024 15:27:10 +0000 Hi, I’m working with a test bench that I made in OSVVM. I have a transaction with a proprietary protocol we use at my company. I’m trying to check data when a control signal goes high, but this Default keeps throwing away transactions even though the waveforms look correct. In my testcase, everything passes. It’s in Default, which I’m not entirely…[Read more]

]]> 0 5d6391969cb62fc509461a85be834d1f Joseph replied to the topic Test case issue in the forum OSVVM https://osvvm.org/forums/topic/test-case-issue#post-2349 Mon, 04 Mar 2024 14:42:51 +0000 This is resolved now. The problem was I was calling the VC directly instead of WRITE or READ, which calls the operations in my VC.

]]> 0 333d44cf1c53bbf30126863da6e6031b Joseph started the topic Test case issue in the forum OSVVM https://osvvm.org/forums/topic/test-case-issue Wed, 28 Feb 2024 21:15:08 +0000 Hi I’m having an issue trying to make a testcase for a proprietary protocol. I’m using Questa Sim. When compiling the testcase file, I get these errors: # ** Error: ../testcases/file.vhd(92): (vcom-1348) Prefix (enumeration literal “WRITE_OP”) of indexed name is not an array.
# ** Error: ../testcases/file.vhd(94): (vcom-1348) Prefix (enumeration…[Read more]

]]> 0 03016e529b48da623343bb793a7f3b6a Joseph replied to the topic Learning OSVVM with AXI4 in the forum OSVVM https://osvvm.org/forums/topic/learning-osvvm-with-axi4#post-2252 Thu, 20 Jul 2023 13:59:01 +0100 Hi Jim,

Thanks for the speedy reply. I can’t post the DO file, but I can try to post the what it is supposed to do. This test bench passes vector files which poke around registers. The vector files use a custom API that my team developed that go through a VHDL file to a VHDL test bench. It is based on OSVVM, but there’s the extra layer from our…[Read more]

]]> 0 63b96e251bc90f34c4b7dc8adaecb334 Joseph replied to the topic Learning OSVVM with AXI4 in the forum OSVVM https://osvvm.org/forums/topic/learning-osvvm-with-axi4#post-2250 Wed, 19 Jul 2023 21:30:35 +0100 I have a test bench that is run from a DO file. It is based on OSVVM. We were wanting to add code coverage, so I was looking into making a PRO file with the settings SetCoverageAnalyzeEnable and SetCoverageSimulateOptions set to true. But I’m not sure how to run the DO file in that PRO file. I’m relatively new to OSVVM, so any input is…[Read more]

]]> 0 41233a3b22ed426a9616adea29f8c3be Joseph became a registered member https://osvvm.org/activity/p/9734 Mon, 05 Jun 2023 14:26:50 +0100 0