Reply To: OSVVM 2020.08 New user experience

#1 – If stopping the simulation with assertion or std.env.stop, it was not a “real” stop.
Hitting the “run all” button in the simulator would let the test bench continue to run endlessly.
Personally I don’t feel like this behavior.

Stopping the clock is the true end. When the simulator stops, there is nothing more to simulate.
Hitting the “run all” button would not do anything.
Modelsim simply stops.
Aldec is even nicer by printing a message saying “no more events”.

I have an enable signal for the clock process. The test process disable the clock in the end.
The AXI responder was not friendly to this approach of stopping the simulation.