The OSVVM 2026.01 release adds one big feature, PCIe CoSim Verification Component, and numerous smaller updates. PCIe CoSim Verification Component OSVVM now has a co-simulation based PCIe Verification Component thanks to Simon Southwell’s hard work. This reverses the typical co-simulation relationship where software communicates through the MIT interface to an OSVVM VHDL VC. Instead, ... »
I am often asked does OSVVM work in XSIM? With the upcoming OSVVM 2025.02 release – YES!!! As I was wrapping up on OSVVM 2025.02 release, inspired by another instance of this question, I decided to take a look at XSIM 2024.2. »
The 2024.05 release adds: Report Updates SPI VC Additions Minor Updates Late Updates – after 2024.05 Report Updates OSVVM automatically generates HTML-based test suite reports, test case reports, and logs that facilitate debugging and provide detailed test artifact collection. OSVVM’s functional coverage reports rival those produced by SystemVerilog vendor tools. OSVVM’s R... »
Ready to go the next step with OSVVM? OSVVM training is available on-line and on-site. Our on-line classes are live sessions with OSVVM author, Jim Lewis. Through SynthWorks, Mr Lewis has been offering VHDL training for 25+ years and on-line training for 10+ years. So don’t worry, we got this. Your on-line class session will be great. Our on-line class sessions are offered in a relax... »
OSVVM 2024.03 updates can be summarized as: Settings/Configuration Updates Xilinx Update OSVVM Issues Resolved Added Verification Components Minor Updates OSVVM 2024.03a addresses an issue introduced in 2024.03 which calls EndSimulation when a simulation finishes with a TCL error code. This allows VHDL files to be closed that were not properly closed when the simulator exited. Unfortunately... »
Quite some time ago I tried out AMD/Xilinx XSIM in OSVVM. Unfortunately at the time, it was like the Talking Heads song – “We’re on a road to no where” Things have changed. We have heard good things about Vivado Synthesis starting to support VHDL-2019 features – like interfaces. Hear that Siemen’s? Are you going to let AMD Vivado pass you as well as Aldec? So my... »
2023 brought lots of changes. I started traveling again (a little bit). This was my first travels since the start of COVID. I presented papers on OSVVM at SEFUW (ESA’s Space FPGA Users Workshop), MAPLD (NASA’s Military and Aerospace Programmable Logic Devices), FPGA Conference Europe (in Munich), and at Verification Futures (both in Reading UK and Austin TX). OSVVM had 5 updates during... »
The 2023.09a release adds: Scripts: build/include now support Early detection of file or path not found and better error messages. $::ARGV (a TCL array) and $::ARGC $::argv (a TCL list), $::argc and $::argv0 OsvvmSettingsPkg: Package with deferred constants to configure OSVVM settings. RandomPkg – Provides the default value for InitSeed UseNewSeedMethods. AlertLogPkg – Provides the def... »
Summary of 2023.01 Changes Co-simulation environment that supports running software (C++) in a hardware simulation environment. Added OsvvmScriptSettings.vhd to the OSVVM utility library. Autogenerated when the OSVVM library is analyzed. Script settings with the OSVVM library Added Interrupt generator and updated interrupt handling. Added PassThru VC for Axi4, Axi4Lite, and AxiStream to act... »
Summary of 2022.12 Changes Updated StartUp.tcl to use OSVVM_TOOL environment variable to determine which tool is run when none is found Updated scripts for Synopsys VCS and Cadence Xcelium Updated log file creation to first use OsvvmBuild.log and then it is copied to “LogFileDirectory”/”BuildName”.log. Updated Generic Handling Both Simulate and RunTest support callin... »