Summary of 2023.01 Changes Co-simulation environment that supports running software (C++) in a hardware simulation environment. Added OsvvmScriptSettings.vhd to the OSVVM utility library. Autogenerated when the OSVVM library is analyzed. Script settings with the OSVVM library Added Interrupt generator and updated interrupt handling. Added PassThru VC for Axi4, Axi4Lite, and AxiStream to act... »
Summary of 2022.12 Changes Updated StartUp.tcl to use OSVVM_TOOL environment variable to determine which tool is run when none is found Updated scripts for Synopsys VCS and Cadence Xcelium Updated log file creation to first use OsvvmBuild.log and then it is copied to “LogFileDirectory”/”BuildName”.log. Updated Generic Handling Both Simulate and RunTest support callin... »
As I was writing the blog about the 2022.10 Multiple Verification Component example, my focus was drawn to the issue, “How do I call transactions that iterate across an array of verification components?” Solving this issue became the main goal of the 2022.11 release. The 2022.11 release includes: Updated Multiple Verification Component Test Example Created AddressBus and Stream transac... »
Several times now I have been asked how to use multiple OSVVM VC, like a UART, in a simulation. This should be simple, however, there are a couple of VHDL and OSVVM got-yas. For the 2022.10 release, I prepared a basic example that instances 16 UartTx and UartRx components. The good thing about writing test cases like this is that it reveals further opportunities for improvements. As I wrote this a... »
Summary of recent changes in OSVVM. Added Ethernet Phy and MAC verification components for GMII, RGMII, MII, RMII Added interrupt handler that supports any verification component that uses the Address Bus Model Independent Interface RandomPkg: added SetRandomSalt as a method to add an offset to all InitSeed calculations – Thanks Torsten M Added demo of using multiple OSVVM VC using “fo... »
Summary of Changes in 2022.06 Scripting: At build completion, print single-line, text-based build summary Scripting: Improved Error Handling. (continuing from 2022.05) Scripting: Updated HTML log file generation. Log file always created. HTML optionally created Scripting: Optional generation of a do file – for submitting bug reports to vendors Scripting: Added Generic handling for simulate: ... »
Abstract OSVVM has grown tremendously over the last couple of years. This period saw simulator independent scripting, test reporting, model independent transactions, virtual transaction interfaces, and additional verification components, each added and incrementally improved. We have talked about these previously in this webinar series. This webinar focuses on advances in OSVVM data structures. OS... »
Abstract According to the 2020 Wilson Verification Survey FPGA verification engineers spend 46% of their time debugging. As a result, we need good scripting to simplify running tests and good reports to simplify debug and help find problems quickly. Scripting can be complicated no matter what language – particularly with EDA tools that need to stay rooted in one directory while it is advantageous ... »
I just posted 2022.05a release. 2022.05 added html transcripts capability to a larger set of tools. Unfortunately this capability requires a new version of TCL that is not supported by older tools, such as Riviera-PRO 2018.02. 2022.05a release fixes this. If you have issues, you can report them in the OSVVM forum, on github issues, or you can send them directly to me. The first two being most reli... »
For some time now, OSVVM has been doing releases every month. Sometimes I talk about them, sometimes they just get posted to the downloads page. Over the past several releases OSVVM has: Improved documentation. Improved our already best in industry test reporting capability. Improved scripting capabilities. Find code coverage tedious – we run, save, merge, and report it in a very simple... »