Reply To: Access signals from test harness
I try to user either a Verification Component or a Monitor to provide an abstraction layer for all interactions with the DUT.
If there need to be exceptions to this, then you can use external names in TestCtrl to access items from the DUT. To make this feasible, when creating the test harness (top level netlist that connects DUT, VC, and TestCtrl) make sure to instance the DUT first and TestCtrl last.
To use external names, the language a referenced item must already be elaborated. VHDL elaboration of the test harness is top to bottom. The order of instances in the test harness then allows TestCtrl to access signals in the test harness, the DUT or any VC.
The VTI testbenches use external names to access the record. You can see an example there of how to use external names if you have not used them before. See https://github.com/OSVVM/AXI4/blob/fd86f4a797b60f12fbf80c506c8239968eb8a1fb/Axi4/testbenchVti/TestCtrl_e.vhd or if you have the files locally: OsvvmLibraries/AXI4/Axi4/testbenchVti/TestCtrl_e.vhd