Reply To: Generate Statement Breaks UART RX VC

Why OSVVM™? Forums OSVVM Generate Statement Breaks UART RX VC Reply To: Generate Statement Breaks UART RX VC

#1970
Michael
Member

Thanks for the quick response Jim! I will try to get it working on my end in the meantime, just for the sake of getting deeper into the weeds with OSVVM.

I am simulating with Aldec Riviera Pro v.2019.10

Regards,
Michael