Reply To: Generate Statement Breaks UART RX VC

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May 9, 2022 at 22:31 #1970
Michael
Member

Thanks for the quick response Jim! I will try to get it working on my end in the meantime, just for the sake of getting deeper into the weeds with OSVVM.

I am simulating with Aldec Riviera Pro v.2019.10

Regards,
Michael