Reply To: Race conditions / buffer issues in console output
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May 20, 2022 at 07:16
#1978
Member
It seems the problem was on my end after all
When I call
vsim -batch -do "build project.pro"
the output is fine. However, when I call it with a pipeline operator to postprocess the output
vsim -batch -do "build project.pro" | cat
the output is somehow mixed up.
This is a buffering problem which can be solved with unbuffer:
unbuffer -p vsim -batch -do "build project.pro" | cat
See also the respective github isse:
Issue on Github