Reply To: VHDL Assert that prints the entity instance name and path
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HassanI have used these 3 attributes (simple_name, instance_name, path_name) in a process but it seems that Quartus synthesis does not support any of them at all. It just gives error “predefined attribute … is not supported”
p_assert_generics: process
begin
report p_assert_generics’simple_name severity warning;
report p_assert_generics’instance_name severity warning;
report p_assert_generics’path_name severity warning;
assert MAX_VALUE < 16
report “MAX_VALUE is outside range”
severity failure;
wait;
end process;
From what I know, when we run synthesis, all processes in a design will run once.