Reply To: Creating Asynchronous Clocks

[Jim Lewis]

2024.07 updates CreateClock. They are breaking changes – meaning the way clock starts up is different. There was alot of unneeded complexity that was part of the old CreateClock that has been minimized – while still keeping clock changing at simulation cycle 0 (aka delta cycle 0).

If you want to preview it, see the Dev branch. Nominally it looks like this:

  procedure CreateClock (
    signal   Clk             : inout std_logic ;
    constant Period          : in    time ;
    constant DutyCycle       : in    real := 0.5 ;
    constant Offset          : in    time := 0 sec ;
    constant ClkActive       : in    std_logic := CLK_ACTIVE 
  ) ;

Without an offset, Clk starts with CLK_ACTIVE at time 0.

The old CreateClock the starting value depended on the initialization of clock and whether the Clock active time matched the clock inactive time. That is not so good as a small change in setup (like initialize the clk vs not initializing it) resulted in differences in behavior.

The old behavior will be available either as OldCreateClock or if you set options in OsvvmSettingsLocal. I will get more into this in the release notes later.

There is also a version that has an enable signal (boolean).

There is also a version that creates a jitter clock. CreateJitterClock.