Reply To: Comparing Two std_logic_vectors

[Torsten]

First: You should use numeric_std from IEEE instead, the std_logic_unsigned or std_logic_signed are proprietary libraries written by Synopsys. For example, see this article by Sigasi for reasons why you should the IEEE libraries instead of the Synopsys ones. If you use VHDL 2008, you can use the numeric_std_unsigned / numeric_std_signed libraries from IEEE. But the main drawback remains: you can only have signed or unsigned operations in one design unit, you can’t use both libraries at the same time.

But I have looked in the source. As their implementation seems only convert to unsigned/signed internally, I see no reason why they should not work with std_logic_vectors bigger than the range of integer type. For example, ‘>’ operator is implemented like this:


function ">"(L: std_logic_vector; R: std_logic_vector) return boolean is
begin
return unsigned(L) > unsigned(R);
end;