Reply To: Limitation using MemoryPkg
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June 28, 2017 at 18:47 #1392
For the time being, you can use more than one memory model.
A past version used integer_vector instead of integer. This is something I intend to re-consider in the future. The problem is it adds complication and overhead to all models. This is something that needs to be considered. I am looking into using generics with the package to handle this and some other features I am considering. I am particularly interested in the VHDL-2017 generics on protected types.
The VHDL type REAL is a double (64 bits) – so it could handle the value but integer_vector would be a better solution.