#1 – If stopping the simulation with assertion or std.env.stop, it was not a “real” stop.
Hitting the “run all” button in the simulator would let the test bench continue to run endlessly.
Personally I don’t feel like this behavior.
Stopping the clock is the true end. When the simulator stops, there is nothing more to simulate.
Hitting the “run…[Read more]
Thanks for the quick response.
#2 – Some learning experience here.
I started the journey by studying the example test bench TbAxi4_BasicBurst.
The example went broken as soon as I changed AXI_DATA_WIDTH to a wider one in TbAxi4.
Looking back, it was probably the test cases.
But at that time I did not realized that the test was doing…[Read more]
Hi I just created my very first OSVVM test bench based on the example.
It was with release 2020.08.
Here are my experience/questions, mostly about the newly released AXI4 models:
1. Could the test bench be stopped gracefully by stopping all clocks?
I don’t feel like the idea of using assertion or std.env.stop to end the simulation.
Stopping the…[Read more]