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Cahit replied to the topic impore function GotScoreboards – Fatal: (SIGSEGV) Bad handle or reference. in the forum OSVVM 8 months, 3 weeks ago
Hi Jim,
That’s good to know. Thanks!I did have issues running the osvvm demo as well, but luckyly my testbench is working – except the reporting part. We will be switching to a newer ModelSim version soon. I will try it out after the change.
Many thanks!
Cahit -
Graeme became a registered member 8 months, 3 weeks ago
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Jim Lewis replied to the topic impore function GotScoreboards – Fatal: (SIGSEGV) Bad handle or reference. in the forum OSVVM 8 months, 3 weeks ago
Hi Cahit,
That is a bug in ModelSim 2016.04.In addition to that bug, you may run into scripting issues as the version of TCL is with 2016 is too old.
You will need a newer simulator version. Keep in mind that simulator is 8 years old at this point. They have fixed many bugs since then.
Best Regards,
Jim -
Ege Ömer became a registered member 8 months, 3 weeks ago
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Cahit started the topic impore function GotScoreboards – Fatal: (SIGSEGV) Bad handle or reference. in the forum OSVVM 8 months, 3 weeks ago
Hi,
I am building a unit test for a large function that we use, but during report generation (EndOfTestReports) I get the following error.
# ** Fatal: (SIGSEGV) Bad handle or reference.[Read more]
# Time: 3 ns Iteration: 2 Process: /***_tb/test_ctrl_i/control_p File: /***/OsvvmLibraries/osvvm/ScoreboardGenericPkg.vhd
# Fatal error in Subprogram… -
Eduardo became a registered member 8 months, 3 weeks ago
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Johan became a registered member 8 months, 3 weeks ago
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Eilert Backhus replied to the topic VHDL port map between std_logic_vector(0 downto 0) and std_logic in the forum VHDL 8 months, 3 weeks ago
Hello Hassan.
It’s one of the fundamental concepts of VHDL: Strong Typing.A vector is a different type than its base type.
You have mentioned a specific corner case: (0 downto 0)
As you mentioned this was the result of some generics, which means at some other time this vector could also result in e.g. (6 downto 0).Now consider that your code…[Read more]
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Niras became a registered member 8 months, 4 weeks ago
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Richard became a registered member 8 months, 4 weeks ago
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Shahad became a registered member 9 months ago
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Julian became a registered member 9 months ago
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t became a registered member 9 months ago
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Tannar became a registered member 9 months ago
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Brad Adam replied to the topic Creating Asynchronous Clocks in the forum OSVVM 9 months ago
Hey,
This is awesome news, I really appreciate the continued updates to these libraries.
Regarding clock jitter, looking into the code in ClockRstPkg.vhd I’m not sure I fully understand what is happening with the supplied coverage ID. Has there been a documentation update which details this new function?
I would expect a jitter clock to…[Read more]
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James became a registered member 9 months ago
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Conner became a registered member 9 months, 1 week ago
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