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Rémi became a registered member 11 months ago
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Ajeetha Kumari changed their profile picture 11 months ago
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Ajeetha Kumari's profile was updated 11 months ago
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Ajeetha Kumari started the topic Generic testControlProc – can this be a pattern? in the forum OSVVM 11 months ago
Hi there,
Coming from SV/UVM and the concept of design patterns applied to testbenches, am looking for common patterns in a typical OSVVM TB. Things such as:1. ClockGen
2. ResetGen
3. EndOfTestReportI believe the above 3 are straightforward (need to add #3 to my generator yet). What about some of the initialization code that I see in TbUart…[Read more]
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Ajeetha Kumari replied to the topic GHDL workarounds – any known ones? in the forum OSVVM 11 months ago
Thanks Jim, I understand this better now – it’s scoping issue when multiple types are getting visible to a test.
Regards
Ajeetha -
Jim Lewis replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 11 months ago
Hi Brad,
Did you add “global aldec” or “global ALDEC”? Your note above seemed to indicate that it is lower case. OTOH, the error messages are referencing an upper case $ALDEC. I should note if I do “puts $aldec” it works. If I do “puts $ALDEC” it does not work.There is no “$aldec” in $PATH_TO_SIM_DIR right?
Cheers,
Jim -
Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 11 months ago
Hey,
I totally agree. This is part of what was so confusing to me. I could see that when using $aldec and running the test the variable would be properly expanded as you show, however, a bit further into the run, when attempting to load the aldec_matlab_cosim.dll the path would still show an unexpanded variable $ALDEC in the path.
I actually…[Read more]
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Jim Lewis replied to the topic Can OSVVM Verification Component be used in VUnit based testbench? in the forum OSVVM 11 months ago
Currently to get the HTML and JUnit XML reports you must use OSVVM scripting. The problem is that both the scripts and the VHDL code writes to the files.
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Jim Lewis replied to the topic Log, Alert and Affirm in OSVVM in the forum OSVVM 11 months ago
I use alerts in protocol checkers. If a VC receives a transaction done event when a transaction is not active, that is an alert and not an affirmation – think of the older intel X86 interfaces that used the signal nRdy to indicate a transaction is complete – receiving a stray nRdy is a bad thing.
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Jim Lewis replied to the topic Check functions in OSVVM in the forum OSVVM 11 months ago
More direct control refers to output formatting when a check passes or fails.
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Jim Lewis replied to the topic Dissecting the OSVVM AXI Master BFM in the forum OSVVM 11 months ago
> From my knowledge, VHDL already contains resolution functions for scenarios where something has multiple drivers. So are new functions required to resolve records with multiple drivers?
VHDL has a resolution function for std_ulogic named resolved. Its non-driving element is ‘Z’. Its default value is ‘U’. If you do not initialize it, then…[Read more] -
Jim Lewis replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 11 months ago
Hi Brad,
Cool. If we end up needing that, it will be added. However, that said, I am curious as to why it is needed. Normally variable expansion is done in the calling scripts.So if I do:
SetExtendedSimulateOptions "-dbg -t 0 -ieee_nowarn -dataset {./sim} -datasetname {sim} -loadvhpi $aldec/bin/aldec_matlab_cosim.dll:ml2hdl"
Then I…[Read more]
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Jim Lewis replied to the topic GHDL workarounds – any known ones? in the forum OSVVM 11 months ago
Hi Ajeetha,
Since you are creating a code generator I recommend that when it uses ScoreboardIDType that it always uses a selected path that includes the library and package as that way if people using the generated code add to it they too will not have any issues – and they will have a safe example from which to template.If your generator…[Read more]
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Jim Lewis replied to the topic GHDL workarounds – any known ones? in the forum OSVVM 11 months ago
Hi Ajeetha,
WRT scoreboards, there are no known issues with either GHDL or NVC.There is a subtle VHDL thing with using or referencing multiple generic packages that declare a type – such as ScoreboardIDType that is declared in ScoreboardGenericPkg.
If you reference only one Scoreboard package instance, such as ScoreboardPkg_slv, then the…[Read more]
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Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 11 months ago
Hey, Jim!
So I’ve been working with Aldec as well on this and we’ve tracked down the root cause of OSVVMs failure to correctly call the $ALDEC variable.
Turns out that we needed to add “global aldec” to the VendorScripts_RivieraPro.tcl within the vendor_simulate process.
I don’t think there is a way to add images on these forms to show you…[Read more]
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Ajeetha Kumari started the topic GHDL workarounds – any known ones? in the forum OSVVM 11 months ago
I am new here in this forum, am creating a Python based utility to enhance productivity with OSVVM based TBs. One of them is a testbench skeleton generator that should go live shortly (opensource). While navigating some examples I see:
[code]
library OSVVM ;
context OSVVM.OsvvmContext ;
— use osvvm.ScoreboardPkg_slv.all ;
–!! GHDL
use…[Read more] -
Hassan replied to the topic Dissecting the OSVVM AXI Master BFM in the forum OSVVM 11 months ago
The functions that are used to perform interface transactions and directive transactions are quite flexible and numerous. They include blocking and non-blocking calls aka asynchronous. These applies to the manager and subordinate, both read and write and also check functions.
Why is there need to have both blocking and non-blocking function…[Read more]
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Hassan replied to the topic Dissecting the OSVVM AXI Master BFM in the forum OSVVM 11 months ago
The MIT document for streaming and address mapped interfaces states this: “One of the challenges of using a single record, such as AddressBusRecType, as an interface is dealing with multiple drivers on each record element. OSVVM does this giving each element a resolved type, such as bit_max, std_logic_vector_max_c, integer_max, time_max, and…[Read more]
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Copin became a registered member 11 months ago
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Guy became a registered member 11 months ago
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