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Hi Andrea

I am answering as someone in a simular position to you, who now has a good working knowledge of OSVVM and a full AXI4 Verification BFM available to me hand written using my own interfacing around OSVVM features. I have never done any OSVVM training, but I do have a background with some experience of SV and UVM.

1. I cannot comment on…[Read more]

Hi Andrea,

Regarding your question 3):

First, you mentioned that your current VHDL testbenches write output data into a file, and then you process (offline) the obtained data vs. reference data.
In my opinion, it is better to compare output data vs. reference data directly in VHDL testbench, because you have a self-checking testbench in that…[Read more]