I require that when the simulation starts the AxiReceiver TReady is low and it stays this way until the VC is given command to read input. This is one of the tests that I have written.
The WaitForGet is declared in line 153 of the AxiStreamReceiver. I tried to change its state using SetAxiStreamOptions(StreamRxRec, RECEIVE_READY_WAIT_FOR_GET, TRUE); as the first line in the AxiReceiverProc. However, it changes state in the VC itself on the first rising edge of the clock inspite of this.
I am forced to change the WaitForGet in the VC soure code itself so the TReady signal of the VC does not get asserted after the simulation starts. This is because the TReady is asserted by the VC before the reset is released and before the clock signal starts to toggle. Why is the TReady being asserted so soon?