Configuring the AXI-Lite WSTRB

[Brad Adam]

Hello again,

I’m using the AXI Lite manager VC to interface with a DUT which will eventually take what is written via AXI Lite and write it to a dpRAM.

The issue I’ve run into is that I see no way to properly decouple the data width from the strb width for this record. In this case my data width is 32-bits which means that the manager code will set the strb width to 4 bits. In most cases this is fine but for this system I need to write to addresses which do not have an offset of 4.

Is there an existing way to manually set the strb width to 1 bit even if the data width is 32 bits?

Thanks!

[Brad Adam]

Just found what I think is the answer in the AXI4_VC_user_guide on table 9.3.2 which lists WSTRB as non-configurable.

So I guess my question becomes, is this still accurate and if so, is there a known way to work around this in OSVVM?

[Jim Lewis]

Hi Adam,
I am not sure what that means. What are you trying to do? In Axi4Lite, strb is a byte strobe that indicates the corresponding 8 bits is part of the write. The strb will be active when Valid is active. This may be multiple clock cycles if Ready is not also active.

Does the dpRAM only accept full 32 bit writes? Maybe this device always writes 32 bits of data independent of the strb setting and that strb is totally ignored. Axi4Lite does not do bursts, so I don’t think you will see a cycle where Valid is active, but the interface does not contain any data that is valid (ie: strb is 0000). That said, if you want the dpRAM to accept AXI data only if at least one byte valid, then you could just OR all the strb bits together.

Best Regards,
Jim

P.S. The DpRam VC also has a behavioral model of a DpRam. If you try it out be sure to let us know how it goes.

[Jim Lewis]

Hi Adam,
Is your question, how do you connect AXI4 up to a memory that only supports word addressing? The memory would ignore the lower bits of address that correspond to the byte addresses and it would ignore strb totally. If there is a write data operation as signified by Valid and Ready, then all 32 bits get written into memory. There is no requirement on AXI for the subordinate, like dpRAM to pay any attention to strb.

Best Regards,
Jim

[Brad Adam]

Hey,

So this is an atypical use case for sure.

Usually I use the Axi4Lite VC as ‘normal’ and if, for instance, I was sending 32-bit data to some addresses I would do:

write(trans_rec, x”0000″, x”DEADBEEF”);
write(trans_rec, x”0004″, x”DEADBEEF”);
write(trans_rec, x”0008″, x”DEADBEEF”);

Where the base address is increasing by x”4″. to account for the 4 bytes of data being written to memory.

In this case the final destination for these writes increments by x”1″. So the writes look like:

write(trans_rec, x”0000″, x”DEADBEEF”); –WSTRB = 1111
write(trans_rec, x”0001″, x”DEADBEEF”); –WSTRB = 1110
write(trans_rec, x”0002″, x”DEADBEEF”); –WSTRB = 1100
write(trans_rec, x”0003″, x”DEADBEEF”); –WSTRB = 1000
write(trans_rec, x”0004″, x”DEADBEEF”); –WSTRB = 1111

But in doing this the WSTRB parameter is taking on the values listed as a comment above. The result being that only the upper bits corresponding to the WSTRB 1’s for sends to x”0001″, x”0002″, and x”0003″ are considered part of the write.

Could I ask where exactly you would need to or the WSTRB bits to so that as long as 1 bit is 1 the full send is valid? Would that need to occur within the OSVVM test bench or the VC itself?

[Brad Adam]

Yes, writing to a memory that supports word addressing is the more accurate way of saying this. I would like to ignore WSTRB but the issue seems to be occurring at the manager side, not the subordinate side.

As in the comment above if I do the following:

write(trans_rec, x”0001?, x”DEADBEEF”); –WSTRB = 1110

The AXIBUS data line shows that DEADBEUU is sent to the DUT because WSTRB is not equal to x”F” when the memory address given is not divisible by x”4″.

[Jim Lewis]

Hi Adam,
If you are using the OSVVM Axi4Lite VC, the best way to get word addresses is to just throw away the lower address bits and do full word writes to the interface. Hence, the transaction calls would still use the addresses X”0000″, X”0004″, X”0008″, …, but since you are throwing away the lower two address bits, the memory would see it as X”0000″, X”0001″, X”0002″, ….

This way you do not need to do any funny business with the WSTRB or the data.

Looking at the code, I suspect if you give it a byte address of other than 0, some of the data information will be masked. This is the correct thing to do for AXI, so I think you will need to follow my suggestion in the first paragraph.

Best Regards,
Jim

[Jim Lewis]

The X”DEADBEUU” you are seeing is due to the masking of the lower byte.

[Brad Adam]

I appreciate the insight, Jim. Was approaching this from the wrong angle.

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