Hello everyone,
I want to use the Xilinx platform to design a vehicular ABS control scheme. The design flow is to desing the control
system in Matlab ,and use the HDL coder provided therein to judge the
resource utilization in the Xilinx design tool. But, the problem is, how
to validate the design in Xilinx ? Like, how do I judge the performnace
of the Xilinx generated VHDL implementation of the control
system, in terms of system response. I don’t want the Matlab
validation, since it’s just a mathematical simulation of the system
quation. I want to see the performance of the Xilinx generated VHDL
code. Also, the problem is, i want to design the control system, directly in VHDL. Taking appropriate measures for changing the control scheme , and making the desing tailor made for the control system in mind. How to validate those ?*
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