In the Questa – Intel 2022.0X version, the osvvm library was removed, but the library mapping for osvvm still remains in the ini file at /questa_fse/modelsim.ini. This unfortunately prevents OSVVM from compiling.
The only way I have found to fix it is to comment out the mapping in the ini file. To do this, simply put a ‘;’ as the first character of the line as shown below.
The OsvvmCOntext.vhd file in version 2023.04 seems out of sync with this post. It is still requiring a compile of these packages to “osvvm” when other packages include “use work.*.all” statements.
context OsvvmContext is
library OSVVM ;
use OSVVM.OsvvmScriptSettingsPkg.all ;
use OSVVM.NamePkg.all ;
use OSVVM.NameStorePkg.all ;
use OSVVM.TranscriptPkg.all ;
use OSVVM.TextUtilPkg.all ;
use OSVVM.OsvvmGlobalPkg.all ;
use OSVVM.AlertLogPkg.all ;
use OSVVM.SortListPkg_int.all ;
use OSVVM.RandomBasePkg.all ;
use OSVVM.RandomPkg.all ;
use OSVVM.CoveragePkg.all ;
use OSVVM.MemoryPkg.all ;
use OSVVM.ResolutionPkg.all ;
use OSVVM.ResizePkg.all ;
use OSVVM.TbUtilPkg.all ;
use OSVVM.ReportPkg.all ;
use OSVVM.OsvvmTypesPkg.all ;
The working library (denoted as work in VHDL) is the library into which you are currently compiling. Hence, the OSVVM packages use the name work to reference items (use work.TranscriptPkg.all).
Currently VHDL context clauses do not allow the usage of the library work. Hence, you see the usage of OSVVM there.
Diving a little further into the usage of work, any time we expect two pieces of an IP block to always be in the same library, using the relative reference of work allows the blocks to be put in different libraries on different projects.
For more details see “Modeling for Verification” in the course notes for Essential VHDL Testbenches and Verification.
P.S. For faster answers, open a new question. For some reason, I did not get a notice on this and just happened to see it.