Running AXI4 Simulation from OSVVM Libraries repository

[Hassan]

The TbAXI4.vhd contains AXI4 Manager and Subordinate along with the Test controller/sequencer called TestCtrl. It also contains clock and reset source.

There is one more thing called Axi4Monitor. I found a source file called Axi4Monitor_dummy.vhd which has an entity but empty architecture. Does this mean that the monitor module is not yet completed and shall be complete some time in the future?

Is this supposed to be a monitor module that detects protocol violations?

[Jim Lewis]

Yes. The long term plan is to add more extensive protocol violation checks in Axi4Monitor. I think a number of them are about checking that an AXI4 manager always composes a complete transaction. I am not sure the value of them if you are developing an Axi4Subordinate (formerly known as slave).

[Hassan]

The AXI4Manager source code contains these lines in the architecture declaration part:

signal WriteAddressFifo : osvvm.ScoreboardPkg_slv.ScoreboardIDType ;
signal WriteDataFifo : osvvm.ScoreboardPkg_slv.ScoreboardIDType ;

signal ReadAddressFifo : osvvm.ScoreboardPkg_slv.ScoreboardIDType ;
signal ReadAddressTransactionFifo : osvvm.ScoreboardPkg_slv.ScoreboardIDType ;
signal ReadDataFifo : osvvm.ScoreboardPkg_slv.ScoreboardIDType ;

signal WriteResponseScoreboard : osvvm.ScoreboardPkg_slv.ScoreboardIDType ;
signal ReadResponseScoreboard : osvvm.ScoreboardPkg_slv.ScoreboardIDType ;

I have not used scoreboard yet and am reading the document on the OSVVM scoreboard. However, shouldn’t something like this be in an external “AXI4 monitor” module rather than in the AXI4 master?

[Hassan]

I understand that all of these are basically FIFOs. The term “scoreboard” need not confuse oneself.

[Hassan]

When OSVVM is compiling files, I get a whole lot of messages like this:

# QuestaSim-64 vcom 10.6c Compiler 2017.07 Jul 26 2017
# Start time: 23:57:14 on Jun 06,2024
# vcom -2008 -work osvvm_cosim ../OsvvmLibraries/CoSim/src/CoSimInterruptHandler.vhd
# — Loading package STANDARD
# — Loading package TEXTIO
# — Loading package std_logic_1164
# — Loading package NUMERIC_STD
# — Loading package NUMERIC_STD_UNSIGNED
# — Loading package MATH_REAL
# — Loading context declaration OsvvmContext
# — Loading package IfElsePkg
# — Loading package OsvvmScriptSettingsPkg
# — Loading package NamePkg
# — Loading package ResolutionPkg
# — Loading package OsvvmGlobalPkg
# — Loading package TranscriptPkg
# — Loading package TextUtilPkg
# — Loading package OsvvmSettingsPkg
# — Loading package AlertLogPkg
# — Loading package NameStorePkg
# — Loading package std_logic_textio
# — Loading package SortListPkg_int
# — Loading package RandomBasePkg
# — Loading package RandomPkg
# — Loading package RandomProcedurePkg
# — Loading package MessageListPkg
# — Loading package VendorCovApiPkg
# — Loading package CoveragePkg
# — Loading package TbUtilPkg
# — Loading package ENV
# — Loading package DelayCoveragePkg
# — Loading package MemorySupportPkg
# — Loading package instance MemoryPkg
# — Loading package MemoryGenericPkg
# — Loading package body MemoryGenericPkg
# — Loading package ResizePkg
# — Loading package instance ScoreBoardPkg_slv
# — Loading package ScoreboardGenericPkg
# — Loading package body ScoreboardGenericPkg
# — Loading package instance ScoreBoardPkg_int
# — Loading package ReportPkg
# — Loading package OsvvmTypesPkg
# — Loading context declaration OsvvmContext
# — Loading context declaration OsvvmContext
# — Loading package ModelParametersSingletonPkg
# — Loading context declaration OsvvmContext
# — Loading package FifoFillPkg_slv
# — Loading package AddressBusTransactionPkg
# — Loading context declaration OsvvmContext
# — Loading context declaration OsvvmContext
# — Loading package StreamTransactionPkg
# — Loading package InterruptGlobalSignalPkg
# — Compiling entity CoSimInterruptHandler
# — Compiling architecture Behavioral of CoSimInterruptHandler
# End time: 23:57:14 on Jun 06,2024, Elapsed time: 0:00:00
# Errors: 0, Warnings: 0

However, I only need something simple like this:

# vcom -2008 -work osvvm_cosim ../OsvvmLibraries/CoSim/src/CoSimInterruptHandler.vhd PASSED

Or if it fails, then the reason for the failure. Is that possible?

Is it possible to tell OSVVM what switches to pass to the low level simulator commands that it is invoking e.g what switches to pass to the QuestaSim vcom command that is called when the OSVVM script’s analyze command is invoked?

I have also asked this on gitter actually.

[Jim Lewis]

The following are the primary OSVVM API commands. Note that library sets the active library for analyze and simulate.

- library <LibraryName> [<path>]
   - Make LibraryName found in library directory specified by path the active library. 
   - Create the LibraryName if it does not exist.
   - If path is not specified, use the library directory specified by SetLibraryDirectory.
- analyze [<path>/]<name> [options]
   - Analyze (aka compile) the design into the active library.
   - Name must be a file with an extension that is *.vhd or *.vhdl for vhdl, *.v for verilog, or *.sv for SystemVerilog.
   - Paths are relative to CurrentWorkingDirectory.
- simulate <TestName> [options]
   - Simulate (aka elaborate + run) the design using the active library.
   - TestName is a library unit (entity or configuration)
   - options may be one or more options to the simulator or see generic.
- TestName <test-name>
   - Identify the TestName that is active. 
   - Must match name in the testbench call to SetTestName (aka SetAlertLogName).
- RunTest [<path>/]<name> 
   - Combines analyze, TestName, and simulate into one step.
   - TestName and simulate are set to the base name of <code></code>file<code></code>.
   - Paths are relative to CurrentWorkingDirectory.
- SkipTest <test-name> Reason
   - Add Skip test to the Build Summary Reports with <code></code>Reason<code></code> as part of the report. 
- TestSuite <test-suite-name>
   - Identify the current TestSuite.  If not specified the name is <code>default</code>.
- include [<path>/]<name>
   - Include another project script.
     If <code></code>name<code></code> is a file and its extension is .pro, .tcl, or .do, it will be sourced. 
     If <code></code>name<code></code> is a directory then any file whose name is <code></code>name<code></code> and 
     extension is .pro, .tcl, or .do will be sourced. 
   - Paths are relative to CurrentWorkingDirectory.
- build [<path>/]<name>
   - Start a script from the simulator.  It is include + start a new log file for this script.
   - Paths are relative to CurrentWorkingDirectory.

In all commands that accept a path, relative paths (including no path) is
relative to the directory in which the current script is running.
With the command name, “[]” indicates a parameter is optional.
If shown in a highlighted code example [generic G1 5] then the code must contain the “[]”.

The following commands set options for analyze

- SetVHDLVersion [2008 | 2019 | 1993 | 2002]
   - Set VHDL analyze version.  OSVVM libraries require 2008 or newer.
- GetVHDLVersion
   - Return the current VHDL Version.
- SetCoverageAnalyzeEnable [true|false]
   - To collect coverage for a design, SetCoverageEnable and SetCoverageAnalyzeEnable must be enabled when it is analyzed. 
   - If true, enable coverage during analyze,
   - If false, disable coverage during analyze.
   - If not specified, true is the default.
   - Initialized to false (so simulations run faster)
- GetCoverageAnalyzeEnable
   - Returns the setting for coverage during analyze.
- SetCoverageAnalyzeOptions <options>
   - Use the string specified in <code></code>options<code></code> as the coverage options during analyze. 
- GetCoverageAnalyzeOptions 
   - Return the coverage options for analyze.
- SetCoverageEnable [true|false]
   - If true, set coverage enable to true.
   - If false, set coverage enable to false.
   - If not specified, true is the default.
   - Initialized to true.
   - Impacts both Analyze and Simulate
- GetCoverageEnable
   - Get the CoverageEnable value. 
- SetVhdlAnalyzeOptions <options>
   - Set the VHDL options for analyze to <code></code>options<code></code>.
- GetVhdlAnalyzeOptions 
   - Get the VHDL options for analyze.
- SetVerilogAnalyzeOptions <options>
   - Set the Verilog options for analyze to <code></code>options<code></code>.
- GetVerilogAnalyzeOptions 
   - Get the Verilog options for analyze.
- SetExtendedAnalyzeOptions <options> 
   - Set extended (additional) options for analyze to <code></code>options<code></code>.
- GetExtendedAnalyzeOptions
   - Get extended (additional) options for analyze.

The following impact simulate:

- generic <name> <value>
   - Called in the options part of simulate as <code></code>simulate tb1 [generic width 5]<code></code>
- DoWaves <wave1.do> ...
   - Called in the options part of simulate as <code></code>simulate tb1 [DoWaves wave1.do wave2.do]<code></code>
   - Paths used with wave files are relative to CurrentSimulationDirectory.
- SetSecondSimulationTopLevel <library>.<TestName>
   - Sets the name of a second library unit to use during simulation. 
   - Called before simulate.   
- SetDebugMode [true|false]
   - If true, add debugging options during analyze and simulate.
   - If false, do not add debugging options during analyze and simulate.
   - If not specified, true is the default.
   - Initialized to false (so simulations run faster)
- GetDebugMode
   - Returns the state of DebugMode.
- SetLogSignals [true|false]
   - If true, log signals during simulate.
   - If false, do not log signals during simulate.
   - If not specified, true is the default.
   - Initialized to false (so simulations run faster)
- GetLogSignals
   - Returns the state of LogSignals.
- SetInteractiveMode [true|false]
   - If DebugMode was not set with SetDebugMode, then set it using this value
   - If LogSignals was not set with SetLogSignals, then set it using this value.
   - If true, sets variables AnalyzeErrorStopCount and SimulateErrorStopCount to 1
   - If false, sets variables AnalyzeErrorStopCount and SimulateErrorStopCount to previous value
   - If not specified, true is the default.
   - Initialized to false (so simulations run faster)
- GetInteractiveMode
   - Returns the state of InteractiveMode.
- SetSimulatorResolution <value>
   - Set Simulator Resolution. Any value supported by the simulator is ok.
- GetSimulatorResolution
   - Return the current Simulator Resolution.
- SetCoverageSimulateEnable [true|false]
   - To collect coverage during a simulation, SetCoverageEnable and SetCoverageSimulateEnable must be enabled the simulation is started. 
   - If true, enable coverage during simulate,
   - If false, disable coverage during simulate.
   - If not specified, true is the default.
   - Initialized to false (so simulations run faster)
- GetCoverageSimulateEnable
   - Returns the setting for coverage during simulate.
- SetCoverageSimulateOptions <options>
   - Use the string specified in <code></code>options<code></code> as the coverage options during simulate. 
- GetCoverageSimulateOptions 
   - Return the coverage options for simulate.
- SetExtendedSimulateOptions <options>
   - Set extended (additional) options for simulate to <code></code>options<code></code>.
- GetExtendedSimulateOptions
   - Get extended (additional) options for simulate.

Note that SetInteractiveMode and SetDebugMode may also change analyze in some simulators (such as Aldec)

The following are options currently only for GHDL and NVC.

- SetExtendedElaborateOptions <options>
   - Set extended (additional) options for simulate to <code></code>options<code></code>.
- GetExtendedElaborateOptions
   - Get extended (additional) options for simulate.
- SetExtendedRunOptions <options>
   - Set extended (additional) options for simulate to <code></code>options<code></code>.
- GetExtendedRunOptions
   - Get extended (additional) options for simulate.
- SetSaveWaves [true|false]
   - If true, save waveforms during simulate.
     If not specified, true is the default.
     Initialized to false (so simulations run faster)
- GetSaveWaves
   - Returns the state of LogSignals.

BTW, this all comes from either README.rst in the scripts directory or from Script_user_guide.pdf in OsvvmLibraries/Documentation.

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