Viewing 5 posts - 1 through 5 (of 5 total)
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  • #1053

    Hi

    Testing a divider in VHDL which is roughly given by:

    L: for i in 0 to (16-1) generate

        data_o(i) <= data_i(8 + i);

    end generate;

    I would like to know how to get started with OSVVM as there are not a-lot of “hello world” type examples floating around.

    My first thought is to generate a RandomPType of some range and assign this to data_i. I would then need to check that the random data_o is correct for random data_i.

    How can I achieve this with OSVVM?

    Thanks

    Lachlan.

    #1055
    Torsten
    Member

    There is a simple example of verifying an adder with OSVVM on EDA playground, maybe this helps.

    https://www.edaplayground.com/x/49J

    It basically creates a variable of CovPType to generate random stimuli data dependent on coverage holes. The coverage goal is given by BINs with the GenBin and AddCross methods. The simulation finishes when all given bins are hit at least one time, what means that coverage is 100%.

    #1056
    Jim Lewis
    Member

    Did you look at the user guides?  They are in the download that is available through osvvm.org.

    #1057

    Thanks everyone,

    My main underlying thought is how do we know that the divider has actually functioned correctly based on the random stimuli?.  

    Can osvvm be used in this way where we tell it about the ‘desired’ output of a mathematical function like this?

    Thanks

    Lachlan.

    #1061
    Torsten
    Member

    As far as I know, you have to create a reference model for your divider by yourself. Maybe in form of precalculated values or with a behavioural model which runs in parallel to the DUV.

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