Latest Activity – Open Source VHDL Verification Methodology

David started the topic NVC Simulation Error in the forum OSVVM 1 month ago

Hello Jim,

I’m not sure if this is an OSVVM issue, a QuestaSim issue or an NVC issue, could you help me identify where/if this should be raised please? or if my VHDL is wrong that is using OSVVM.

This code runs successfully in Questa but gives an error when run in NVC:

** Error: type of index BOOLEAN does not match type of array dimension…[Read more]

Jim Lewis replied to the topic Problem with the AXI stream receiver in the forum OSVVM 1 month ago

Hi Jon,
What is the value of TValid during that time? If you do a get and TValid is true, the VC will receive data.

To avoid these sort of things, I usually hold off calling Get until the DUT is out of reset.

Best Regards,
Jim

Jim Lewis replied to the topic XSIM 2025.2 issue with CovPType in procedure in the forum OSVVM 1 month ago

Hi Matthias,
XSIM seems to be a moving target. In 2024.2 similar things happened. Some of what worked in 2023.2 no longer worked. I was able to change things so they worked again – and many things that did not work previously started to work.

Best Regards,
Jim

Jim Lewis replied to the topic Problem simulating with genrics in the forum OSVVM 1 month ago

Hi Jon
Is the generic at the top level of the testbench or is it at a lower level?

Best Regards,
Jim

jon started the topic Problem simulating with genrics in the forum OSVVM 1 month, 2 weeks ago

I am trying to change a generic in my testbench when I start the simulation (using Questasim base). I am using the following script :-
TestName tb_test1
analyze tb_test1.vhd +acc
simulate tb_test1 [generic USE_ADV_MODE 1]
I get the following output from the simulator
vopt {*}-work dma_mm2s -L dma_mm2s tb_test1 common.glbl -o tb_test1_opt…[Read more]