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Alex became a registered member 2 months ago
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Veit replied to the topic Confusion of Axi4Full Testcases in the forum OSVVM 2 months ago
Found 2 more cases (checking currently only AXIFull):
TbAxi4_MemoryBurstAsyncPattern2.vhd:
architecture name: MemoryBurstAsyncPattern1TbAxi4_MemoryReadWriteDebug1.vhd:
architecture name: MemoryReadWrite1 (debug missing) -
Veit started the topic Confusion of Axi4Full Testcases in the forum OSVVM 2 months ago
Hi,
with my marriage (see “https://osvvm.org/forums/topic/using-vcs-without-the-built-in-scripts”) of OSVVM and VUNIT I found a confusion in the TbAXI4_[AXI?]ManagerRandomTiming Testcase:——————————————————-
TbAxi4_ManagerRandomTiming1 :
architecture: ManagerRandomTiming1
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Configuration…[Read more] -
vaibhav became a registered member 2 months, 1 week ago
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Orcel became a registered member 2 months, 1 week ago
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