Eilert Backhus
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Eilert Backhus replied to the topic VHDL port map between std_logic_vector(0 downto 0) and std_logic in the forum VHDL 3 months, 2 weeks ago
Hello Hassan.
It’s one of the fundamental concepts of VHDL: Strong Typing.A vector is a different type than its base type.
You have mentioned a specific corner case: (0 downto 0)
As you mentioned this was the result of some generics, which means at some other time this vector could also result in e.g. (6 downto 0).Now consider that your code…[Read more]
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Eilert Backhus replied to the topic RandomPkg: How to set weight for range in the forum OSVVM 7 years, 5 months ago
Hi Jim,I hoped that there’s some solution using the range notation like you showed:With named association, you can also do the following:
A <= RndA.DistSlv((0=>5, 1 to 14 =>1, 15=>5), A'length) ;I just didn’t expect it to be so straight simple, since the defined type is self defined. You mentioned integer_vectors somewhere else. Are these…[Read more]
