Simon

Co-simulation Run-Time Options Introduction When writing a C or C++ program the entry point for execution is a main function which has a prototype definition as shown below: int main (int […]

Joint RISC-V Code and Logic Debug with rv32 and OSVVM Co­-simulation Introduction In the previous OSVVM co-simulation article, I wrote about debugging co-simulation programs with GDB and how to add an IDE on top of this to give […]

Debugging OSVVM Co-simulation Programs Introduction Co-simulation features were added to OSVVM at release 2023.01. This allows C or C++ code to be compiled for the machine hosting a logic simulator […]

Building an OSVVM Co-simulation VC Introduction With the 2026.01 release of OSVVM a new verification component (or VC) was added to support the PCI Express (PCIe) bus protocol. OSVVM already has […]

Using External Libraries with OSVVM Co-simulation Introduction The OSVVM Co-simulation features allow user supplied C or C++ code to drive model independent transaction (MIT) signals in a VHDL logic simulation […]

Using Multiple Transaction Nodes in OSVVM Co-simulation Introduction The OSVVM co-simulation environment has the ability to generate transactions from C++ to drive various virtual components (VCs), such as AxiBus, […]

Modelling Interrupts with OSVVM Co-simulation Introduction In this article I want to give some thoughts on how to model interrupts within the OSVVM co-simulation environment. The manual details how to […]