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This is just the VHDL signal use model when reading it after assigning it in a process. Since RTL does not allow wait for 0 ns, it is limited to testbenches.

Verilog assignments have the same sort of issue.

Hi Ajeetha,
Next time please provide a complete testable example, such as I have provided below. Try running this.

library osvvm ;
context osvvm.OsvvmContext ;
use osvvm.ScoreboardPkg_int.all ;

ControlProc :…[Read more]

That worked, thanks. Can we bukcteize this as potential race condition?

Do:
stim : process
begin
SB_int <= NewID("COUNT_SB");
wait for 0 ns; -- let SB_int to update
report ("SB_int: " & integer'image(SB_int.Id));
i_up_or_down <= '0';
push(SB_int, 2);
. . .

I guessed that and did add a 1ns delay before calling NewID – please see the stim process above. Still no luck!

Thanks

Hi Ajeetha,
Nope. That is integer’left.

Put a “wait for 0 ns” before reading the signal. That allows a simulation cycle to go by and the signal to update to the value assigned by NewID.

Jim

Thanks, aligns with my thoughts. Yes the generator already creates/uses clock/reset procedures.

Regards
Ajeetha

Depending on what becomes the pattern, it could be a concurrent procedure call (if it encapsulates the entire process), a sequential procedure call (if it only encapsulates most of the process), or as you suggested an entity (but may be more than we need).

Also note that OSVVM’s TbUtilPkg has a CreateClock and a CreateReset

Some of what is in the ControlProc is pretty standard. Some of it is not.
The main items above that are custom are:
UartScoreboard <= NewID("UART_SB", NUM_UARTS) ;
. . .
osvvm_uart.ScoreboardPkg_Uart.WriteScoreboardYaml(FileName => GetTestName & "_sb_Uart.yml") ;

Long term, we should be able to do the UartScoreboard as a constant:
constant…[Read more]

> I can see that the scripts use the explicit name of the file for analyze and run_test TCL commands. However, it is also possible to just do a file search and with the filenames in a list, iterate over the list and call analyze or run_test for each of them.

> Why isn’t it done in this way?

It comes down to testing philosophy. I see the s…[Read more]

The following are primary API commands. Note that library sets the

– library []
– Make LibraryName found in library directory specified by path the active library.
– Create the LibraryName if it does not exist.
– If path is not specified, use the library directory specified by SetLibraryDirectory.
– analyze [/] [options]…[Read more]

I can see that the scripts use the explicit name of the file for analyze and run_test TCL commands. However, it is also possible to just do a file search and with the filenames in a list, iterate over the list and call analyze or run_test for each of them.

Why isn’t it done in this way?

Also, I was expecting to see a whole lot of commands that…[Read more]

When OSVVM is compiling files, I get a whole lot of messages like this:

# QuestaSim-64 vcom 10.6c Compiler 2017.07 Jul 26 2017
# Start time: 23:57:14 on Jun 06,2024
# vcom -2008 -work osvvm_cosim ../OsvvmLibraries/CoSim/src/CoSimInterruptHandler.vhd
# — Loading package STANDARD
# — Loading package TEXTIO
# — Loading package std_logic_1164
# –…[Read more]