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NICOLAS became a registered member 1 year, 3 months ago
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uayso became a registered member 1 year, 3 months ago
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Jake replied to the topic OSVVM Questa Visualizer Support in the forum OSVVM 1 year, 3 months ago
Jim,
Sounds great to me. Thanks for the quick response!I’ll wait to hear back from you.
Thanks again,
Jake -
Jim Lewis replied to the topic OSVVM Questa Visualizer Support in the forum OSVVM 1 year, 3 months ago
Hi Jake,
This is something that one of the Siemens AEs has talked to me about and has worked on. I will have to see if he has something ready to submit for OSVVM. The plan is that Visualizer will simply use a separate VendorScripts_Visualizer.tcl. With that it should be fairly easy to do whatever visualizer needs done as all the hooks are…[Read more] -
Jake started the topic OSVVM Questa Visualizer Support in the forum OSVVM 1 year, 3 months ago
Hello! I’ve recently started using OSVVM to good success in the last couple of months, and am using Questa version 2023.2 for simulations. Questa has a new simulator that is called visualizer. With this version of the simulator, the only difference between using visualizer and what they are calling the classic simulator is the command line…[Read more]
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Will became a registered member 1 year, 3 months ago
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Bahadir became a registered member 1 year, 3 months ago
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Eilidh became a registered member 1 year, 3 months ago
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Kaan became a registered member 1 year, 3 months ago
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Jim Lewis wrote a new post 1 year, 3 months ago
AMD XSIM 2023.02: On the Road to OSVVMQuite some time ago I tried out AMD/Xilinx XSIM in OSVVM. Unfortunately at the time, it was like the Talking Heads song – “We’re on a road to no […]
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Okan became a registered member 1 year, 3 months ago
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Pavlo became a registered member 1 year, 4 months ago
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Jim Lewis wrote a new post 1 year, 4 months ago
Happy New Year 2024 from SynthWorks and OSVVM
2023 brought lots of changes. I started traveling again (a little bit). This was my first travels since the start of COVID. I presented […] -
Jim Lewis replied to the topic Scripting dual-language testbench (VHDL / Verilog) in the forum OSVVM 1 year, 4 months ago
Hi Brad,
I have had on my todo list to come back to look at this example in further detail – I have just had a very busy year end for 2023.Since I don’t have a copy of your testbench, we have only been able to talk in generalities. However, I think I see the issue in your statement here:
> When analyzing that TB file, since the generic has…[Read more]
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Ken became a registered member 1 year, 4 months ago
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