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Hey Jim,

One more quick question now that the expression and branch coverage report is working.

I see that Riviera has robust FSM code coverage reporting capabilities which I hope to be able to leverage in conjunction with OSVVM. I was wondering if the SetCoverageAnalyzeEnable function allows a user to gather FSM code coverage? Currently the…[Read more]

Hey Jim,

Thanks for the quick response. You’re suggestion worked and I am now only collecting the desired coverage information.

I am not running Riviera-PRO in batch mode, but I will be able to work with the current setup thanks to your reply.

Regards,
Michael

Hi Michael,
First a quick answer:
Do SetCoverageSimulateEnable true before you build OSVVM libraries as well as anything else you don’t want coverage collected for.

Why:
Currently when analyze is run for Riviera-PRO by default we do:
vcom -${VhdlVersion} -dbg -relax -work ${LibraryName} {*}${OptionalCommands} ${FileName}

The -dbg flag…[Read more]

It seems the problem was on my end after all
When I call
vsim -batch -do "build project.pro"
the output is fine. However, when I call it with a pipeline operator to postprocess the output
vsim -batch -do "build project.pro" | cat
the output is somehow mixed up.

This is a buffering problem which can be solved with unbuffer:
unbuffer -p vsim -batch…[Read more]