Activity

Hi ALex,
I added the two suggestions I made previously to the code. Choose one of them.
I also changed the WaitForClock(clk, 2) to WaitForClock(InterruptRec, 2).
Usually I do not put clock in TestCtrl. The reason being is if you have lots of
different clocks in your system, it is easy to use the wrong one.

`
rx_process : process is…[Read more]

Still does not work which I had already tried. strange that the coverage is always zero. seems to be a structural issue but could not explain why. Starting a new thread for this.

Hi Alex,
I see a delta cycle issue. Call ICover using Cnt rather than rx_cnt_s.
Or alternately do a wait for 0 ns ; before the call to ICover.

Best Reegards,
Jim

Hi Alex,
Please use a separate topic for separate issues.

I don’t see anything obvious in your code. Have you tried single step?

Jim

Thanks Jim. Meanwhile I am exploring functional coverage. But cannot get a simple coverage running. Please point out what is wrong here:
rx_cnt_s counts upto 20 which has been verified.
RxCov is a signal.

rx_process : process is
variable cnt : integer := 0;

variable rd_data : std_logic_vector(31 downto 0) := (others =>…[Read more]

Hi Jim, you are right, probably there is a way. But, I won’t spend too much time on it for now.

If you want, I can try and work with you on the Avalon MM. I need it for a project.

I have not seen Siemens HDL Designer Pro flow, so I cannot comment on how to use it. Like most things there may be a way.

Avalon MM is progressing slowly.

On another note, on gitter I asked about progress/status of Avalon MM.