OSVVM 2023.01 Release
Summary of 2023.01 Changes
- Co-simulation environment that supports running software (C++) in a hardware simulation environment.
- Added OsvvmScriptSettings.vhd to the OSVVM utility library.
- Autogenerated when the OSVVM library is analyzed.
- Script settings with the OSVVM library
- Added Interrupt generator and updated interrupt handling.
- Added PassThru VC for Axi4, Axi4Lite, and AxiStream to act as the DUT in the OSVVM testbench environment.
The OSVVM Co-simulation features support running software (C++) in a hardware simulation environment. This provides co-simulation capability for any verification component that supports the OSVVM Address Bus Model Independent Transaction (MIT) interface.
More on this from Simon Southwell, the lead developer of the Co-simulation features, in a later blog.
For now, there is the CoSim documentation that you will find in OsvvmLibraries/Documentation/OSVVM_cosimulation_framework .pdf (note currently there is a space in the name) or online at github.com/OSVVM/Documentationblob/main/OSVVM_cosimulation_framework .pdf.
Added OsvvmScriptSettings.vhd to the OSVVM utility library
Early in 2022, OSVVM scripting added the capability to specify the directory into which to put the OSVVM outputs (reports, transcripts, and logs). By default, the outputs are created in the CurrentSimulationDirectory. These outputs can be created in a separate directory by specifying a value for OutputBaseDirectory in the LocalScriptsDefaults.tcl file. For example, the following setting causes the outputs to be put in a directory named OSVVM. This is particularly effective when using a simulator that puts a significant amount of information in the CurrentSimulationDirectory – such as GHDL does.
variable OutputBaseDirectory "OSVVM"
Unfortunately this setting is for the scripts and does not apply to anything that is written to by VHDL code (either by just VHDL or by both the scripts and VHDL). As a result, many temporary files are written to the CurrentSimulationDirectory.
In 2023.01, the package OsvvmScriptSettings.vhd provides the VHDL constant OSVVM_OUTPUT_DIRECTORY which specifies where write temporary files. Anything written directly by OSVVM will automatically use this constant. OsvvmScriptSettings is referenced by the OsvvmContext, so your VHDL programs can use this constant too.
The OSVVM_OUTPUT_DIRECTORY constant is set by the script variable OsvvmTemporaryOutputDirectory. By default its value is the CurrentSimulationDirectory (allowing OSVVM to keep backward compatibility with previous revisions). Set it immediately after the OuputBaseDirectory variable in LocalScriptsDefaults.tcl. A good value to set this value to is to match the value of OutputBaseDirectory, as shown below:
variable OutputBaseDirectory "OSVVM" variable OsvvmTemporaryOutputDirectory $OutputBaseDirectory
After changing OsvvmTemporaryOutputDirectory, be sure to re-build the OSVVM libraries (build “path_to_osvvm”/OsvvmLibraries) as the OsvvmScriptSettings.vhd is autogenerated during the build.
As a new feature, I expect it to evolve some over time.
Added Interrupt generator and updated interrupt handler.
In the OSVVM example testbenches that demonstrate the interrupt handler usage (such as OsvvmLibraries/Common/TbInterrupt/testbench), the interrupt is currently generated from inside of the test sequencer (TestCtrl). This is potentially confusing as in a real system, an external device creates the interrupts.
As a result, InterruptGeneratorBit.vhd was created to generate interrupts. It is currently used in the OsvvmLibraries/CoSim/testbench/TbAxi4_Interrupt. In a future release, it will also be added to the examples in the Common repository.
Created CoSimInterruptHandler.vhd as a specialized Interrupt Handler that works well with the OSVVM Co-simulation environment. InterruptHandler.vhd was updated to allow it to be used in a Co-simulation environment that does not handle the interrupt switching itself.
PassThru VC for Axi4, Axi4Lite, and AxiStream.
The focus of the current OSVVM testbenches for Axi4, Axi4Lite, and AxiStream is to verify the verification components (VC). We often get the comment, “I have found the example testbenches, but I don’t understand where my DUT goes.”
The PassThru VC were created to allow our testbenches that verify the VC to also act as an example test framework that shows how to add a DUT – simply replace the PassThru VC with the DUT. Currently these have only been added to the testbenches in the CoSim repository, but I expect them to make it to the OSVVM repository by the next release.
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Getting Started with OSVVM
The fastest way to learn OSVVM is SynthWorks’ Advanced VHDL Testbenches and Verification which is available world wide either on-line or on-site. Here is our current class schedule. The next class dates are:
- March 20 – 31
- April 24 – May 5
- June 5 – 16
Our on-line class session is offered as 10 half-day sessions. The lecture sessions are approximately 2.5 hours long. Please allow up to 3 hours in your planning in the event of overrun. Independent exercises and labs will take about 1.5 to 2.5 hours per day and are supported by phone, email, or web sessions as necessary. More details on our on-line sessions are at SynthWorks On-line VHDL Class Details.