OSVVM on GitHub, OSVVM Training in Germany, and other OSVVM Training Datess
OSVVM on GitHub
OSVVM is now on GitHub. You can find releases there. I will be putting bug patches there first before formally releasing them on OSVVM.org. Long term I also plan on putting tool specific branches as needed (such as for Cadence).
OSVVM Training in Germany
In conjunction with PLC2, we will be offering OSVVM training in Germany. See the matrix below for the first two dates in Freiburg, Germany.
OSVVM Training Dates
VHDL Testbenches and Verification – OSVVM+ Boot Camp
Learn the latest VHDL verification techniques including transaction level modeling (tlm), self-checking, scoreboards, memory modeling, functional coverage, directed, algorithmic, constrained random, and intelligent testbench test generation. Create a VHDL testbench environment that is competitive with other verification languages, such as SystemVerilog or ‘e’. Our techniques work on VHDL simulators without additional licenses and are accessible to RTL engineers.
|February 29 – March 4||Freiburg, Germany||Enroll with PLC2|
|March 28 – April 1 and April 11-15||online class||Enroll with SynthWorks||April 25-29||Stockholm, Sweden||Enroll with FirstEDA|
|May 9-13||Freiburg, Germany||Enroll with PLC2|
|May 23-27 and June 13-17||online class||Enroll with SynthWorks|
|July 25-29 and August 8-12||online class||Enroll with SynthWorks|
|September 12-16||Bracknell, UK||Enroll with FirstEDA|