Activity

Hi Jim,

currently the absolute path in which the OsvvmLibrary (and therefore the sim folder) is located has a single space character.
I will try to move the files to a different and location and see if ModelSim still crashes.

Hello, thanks for your response!

Inspired by this I ended up using GetModelOptions to implement checking for slave error (my VC is a Wishbone master), and this appears to work as intended:


-- Test invalid register in slave (raise slave error)
ReadCheck(TransRec, x"100FF", x"0000");
GetModelOptions(TransRec, WISHBONE_OPT_ERR,…[Read more]

Thanks so much for the support! We really appreciate it!

Hi Michael,
New version is release as 2022.08. MemoryPkg is now a generic package.

Instance MemoryPkg (and MemoryPkg_X) support any number of bits. If there is an X or U in a bit in the data word, only that bit will read back as an X or U (respectively).

Instance MemoryPkg_NoX supports any number of bits. All meta values (UXZW-) are…[Read more]

Hi Phil,
I just installed 2020.3 Microsemi edition. I have a Libero Silver 1 Yr DiskID NL License. It runs the demo fine.

With some of the older OSVVM versions a space in the path was problematic, however, that was addressed in a previous release.

Best Regards,
Jim

Hi Jim,

I am using the latest release (2022.06a). I sent you the files via email.

Hi Per,
As you have noted, unlike StreamRecType, AddressBusRecType does not have a params field.

What I do in the Axi4Manager VC is use SetModelOptions to set an WB_ERR expected and a WB_RTY expected – sometimes coded together, sometimes coded separately. The AXI4 response codes that need to be checked are BRESP and RRESP. The way we check…[Read more]

Hi Phil,
Which OSVVM release are you running? What does the output say?

Can you email me a copy of the sim/log/ModelSim-2020.3/OsvvmLibraries_RunDemoTests.log and the OsvvmRun.yml. My email is jim at SynthWorks.com

Best Regards,
Jim