Brad Adam
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Brad Adam replied to the topic Creating Asynchronous Clocks in the forum OSVVM 2 months, 3 weeks ago
Hey,
This is awesome news, I really appreciate the continued updates to these libraries.
Regarding clock jitter, looking into the code in ClockRstPkg.vhd I’m not sure I fully understand what is happening with the supplied coverage ID. Has there been a documentation update which details this new function?
I would expect a jitter clock to…[Read more]
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Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 5 months, 2 weeks ago
I did “global aldec”, all lower case.
The error message was referencing an all uppercase $ALDEC but “global aldec” fixed this issue. I noticed the same thing with “puts $aldec” vs “puts $ALDEC” as you describe.
No, there is no $aldec used in the $PATH_TO_SIM_DIR on my machine, that just points to the project directory on my C:/ drive.
Thanks,
Brad -
Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 5 months, 2 weeks ago
Hey,
I totally agree. This is part of what was so confusing to me. I could see that when using $aldec and running the test the variable would be properly expanded as you show, however, a bit further into the run, when attempting to load the aldec_matlab_cosim.dll the path would still show an unexpanded variable $ALDEC in the path.
I actually…[Read more]
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Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 5 months, 2 weeks ago
Hey, Jim!
So I’ve been working with Aldec as well on this and we’ve tracked down the root cause of OSVVMs failure to correctly call the $ALDEC variable.
Turns out that we needed to add “global aldec” to the VendorScripts_RivieraPro.tcl within the vendor_simulate process.
I don’t think there is a way to add images on these forms to show you…[Read more]
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Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 5 months, 2 weeks ago
Okay, that was helpful and after comparing the logs I’m reasonably confident that I am supplying the needed switches to the SetExtendedSimulateOptions.
At this point the remaining failure when using RunTest seems to be in the load libraries steps, specifically the libraries from Aldec. In the below console output, systf.dll and…[Read more]
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Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 5 months, 3 weeks ago
Hey, I appreciate the insight and I actually worked my way to this action after noticing that the simulate command called vsim. I guess one more question to make sure I’m understanding these scripts correctly.
Currently, I know the following script will allow my to run my test and see the results:
SetCoverageSimulateEnable true
analyze…[Read more]
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Brad Adam replied to the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 5 months, 3 weeks ago
Actually, I found the RunTest code in OsvvmProjectScripts.tcl, and the best way to add additional options for this would be following Example_LocalScriptsDefaults.tcl I assume?
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Brad Adam started the topic Riviera / MATLAB Cosim with OSVVM Scripting in the forum OSVVM 5 months, 3 weeks ago
Hey,
So I’ve run into a bit of an issue with the usual OSVVM scripted flow and a testbench which aims to use some MATLAB cosim features. In short, I can successfully cosim if I don’t use RunTest or any of the TestName/analyze/simulate flow. In my experience the code coverage enabled via SetCoverageAnalyzeEnable/Set CoverageSimulateEnable only…[Read more]
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Brad Adam's profile was updated 1 year, 1 month ago
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Brad Adam replied to the topic Scripting dual-language testbench (VHDL / Verilog) in the forum OSVVM 1 year, 1 month ago
Okay, this is very helpful information and from this I believe the answer to what I am trying to do is probably no.
Looking at TestStandAlone.vhd assume there is a generate statement that decides if xMiiPhy gets created or not.
phy_gen : if C_PHY_GEN_TRUE = 1 generatexMiiPhy_1 : xMiiPhy
generic map (
MII_INTERFACE =>…[Read more] -
Brad Adam replied to the topic Scripting dual-language testbench (VHDL / Verilog) in the forum OSVVM 1 year, 1 month ago
Hey,
glbl is a verilog file referenced by an IP from a third party vendor.
Is it possible to set a generic for a file that is analyzed before simulation? Looking at the script users guide I would think that SetExtendedAnalyzeOptions is meant to accomplish this but I could be using the command incorrectly. Is it possible to use…[Read more]
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Brad Adam started the topic Scripting dual-language testbench (VHDL / Verilog) in the forum OSVVM 1 year, 1 month ago
Hello,
I’m wondering if there has been any documentation made for using some script functions with a dual-language testbench. Looking through past articles I’ve found discussion of topics that come close to what I am trying to do but none of which speak to .pro (or since I’m simulating in Riviera .do) considerations.
The core of what I am…[Read more]
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Brad Adam replied to the topic Configuring the AXI-Lite WSTRB in the forum OSVVM 1 year, 5 months ago
I appreciate the insight, Jim. Was approaching this from the wrong angle.
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Brad Adam replied to the topic Configuring the AXI-Lite WSTRB in the forum OSVVM 1 year, 5 months ago
Yes, writing to a memory that supports word addressing is the more accurate way of saying this. I would like to ignore WSTRB but the issue seems to be occurring at the manager side, not the subordinate side.
As in the comment above if I do the following:
write(trans_rec, x”0001?, x”DEADBEEF”); –WSTRB = 1110
The AXIBUS data line shows t…[Read more]
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Brad Adam replied to the topic Configuring the AXI-Lite WSTRB in the forum OSVVM 1 year, 5 months ago
Hey,
So this is an atypical use case for sure.
Usually I use the Axi4Lite VC as ‘normal’ and if, for instance, I was sending 32-bit data to some addresses I would do:
write(trans_rec, x”0000″, x”DEADBEEF”);
write(trans_rec, x”0004″, x”DEADBEEF”);
write(trans_rec, x”0008″, x”DEADBEEF”);
Where the base address is increasing…[Read more] -
Brad Adam replied to the topic Configuring the AXI-Lite WSTRB in the forum OSVVM 1 year, 5 months ago
Just found what I think is the answer in the AXI4_VC_user_guide on table 9.3.2 which lists WSTRB as non-configurable.
So I guess my question becomes, is this still accurate and if so, is there a known way to work around this in OSVVM?
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Brad Adam started the topic Configuring the AXI-Lite WSTRB in the forum OSVVM 1 year, 5 months ago
Hello again,
I’m using the AXI Lite manager VC to interface with a DUT which will eventually take what is written via AXI Lite and write it to a dpRAM.
The issue I’ve run into is that I see no way to properly decouple the data width from the strb width for this record. In this case my data width is 32-bits which means that the manager code…[Read more]
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Brad Adam replied to the topic Simulating Backpressure with the AXIS VC in the forum OSVVM 1 year, 7 months ago
Thank you for this update, I’ll check it out in future testing.
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Brad Adam started the topic Creating Asynchronous Clocks in the forum OSVVM 1 year, 7 months ago
I’m looking to create a simulation that uses two asynchronous clocks, is there a way within OSVVM to add a delay before starting a clock so that it does not begin generating at time 0 in a simulation?
I’m not seeing any options for this within the CreateClock procedure, is there possibly another function that allows this behavior?
Thanks.
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Brad Adam replied to the topic Simulating Backpressure with the AXIS VC in the forum OSVVM 1 year, 8 months ago
Thank you for the detailed response, Jim.
I misunderstood the correct way to use RECEIVE_READY_BEFORE_VALID and RECEIVE_READY_DELAY_CYCLES but this makes a lot of sense.
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