Activity – Brad Adam – Open Source VHDL Verification Methodology

Brad Adam

Brad Adam started the topic Creating Asynchronous Clocks in the forum OSVVM 1 year, 8 months ago

I’m looking to create a simulation that uses two asynchronous clocks, is there a way within OSVVM to add a delay before starting a clock so that it does not begin generating at time 0 in a simulation?

I’m not seeing any options for this within the CreateClock procedure, is there possibly another function that allows this behavior?

Thanks.
Brad Adam replied to the topic Simulating Backpressure with the AXIS VC in the forum OSVVM 1 year, 9 months ago

Thank you for the detailed response, Jim.

I misunderstood the correct way to use RECEIVE_READY_BEFORE_VALID and RECEIVE_READY_DELAY_CYCLES but this makes a lot of sense.
Brad Adam started the topic Simulating Backpressure with the AXIS VC in the forum OSVVM 1 year, 9 months ago

Hello,

I’ve been using OSVVM for several months with great success but I’ve run into a problem with simulating backpressure. At a high level my test bench looks like the following:

AXIS Transmitter –> DUT –> AXIS Receiver

I’d like to test my DUT for operation in the case that the AXIS Receiver is not ready for more data but the transmitter…[Read more]
Brad Adam became a registered member 2 years, 8 months ago

Brad Adam