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Reymund became a registered member 11 months ago
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Omar became a registered member 11 months ago
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Jim Lewis replied to the topic SBRD package issue with Modelsim FPGA edition in the forum OSVVM 11 months, 1 week ago
This is just the VHDL signal use model when reading it after assigning it in a process. Since RTL does not allow wait for 0 ns, it is limited to testbenches.
Verilog assignments have the same sort of issue.
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Jim Lewis replied to the topic SBRD: Check API uses AffirmIf, why GetAffirmCount is 0? in the forum OSVVM 11 months, 1 week ago
Hi Ajeetha,
Next time please provide a complete testable example, such as I have provided below. Try running this.library osvvm ;
context osvvm.OsvvmContext ;
use osvvm.ScoreboardPkg_int.all ;entity TbSB_GetAffirmCount_1 is
end TbSB_GetAffirmCount_1 ;architecture GetAffirmCount_1 of TbSB_GetAffirmCount_1 is
begin
ControlProc :…[Read more]
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Ajeetha Kumari started the topic SBRD: Check API uses AffirmIf, why GetAffirmCount is 0? in the forum OSVVM 11 months, 1 week ago
SBRD User guide says:
<quote>
Check a received value (ActualType) with value in scoreboard. The Match function is
used to determine if the received and expected values match. Checking is handled by
AffirmIf. As a result, if they match a log PASSED is generated, otherwise, an alert
ERROR is generated.
</quote>I didn’t create any AlertID (yet),…[Read more]
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Ajeetha Kumari replied to the topic SBRD package issue with Modelsim FPGA edition in the forum OSVVM 11 months, 1 week ago
That worked, thanks. Can we bukcteize this as potential race condition?
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Evangelos became a registered member 11 months, 1 week ago
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Jim Lewis replied to the topic SBRD package issue with Modelsim FPGA edition in the forum OSVVM 11 months, 1 week ago
Do:
stim : process
begin
SB_int <= NewID("COUNT_SB");
wait for 0 ns; -- let SB_int to update
report ("SB_int: " & integer'image(SB_int.Id));
i_up_or_down <= '0';
push(SB_int, 2);
. . . -
Ajeetha Kumari replied to the topic SBRD package issue with Modelsim FPGA edition in the forum OSVVM 11 months, 1 week ago
I guessed that and did add a 1ns delay before calling NewID – please see the stim process above. Still no luck!
Thanks
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Jim Lewis replied to the topic SBRD package issue with Modelsim FPGA edition in the forum OSVVM 11 months, 1 week ago
Hi Ajeetha,
Nope. That is integer’left.Put a “wait for 0 ns” before reading the signal. That allows a simulation cycle to go by and the signal to update to the value assigned by NewID.
Jim
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Evangelos became a registered member 11 months, 1 week ago
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Guy became a registered member 11 months, 1 week ago
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Timothée became a registered member 11 months, 1 week ago
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Ajeetha Kumari started the topic SBRD package issue with Modelsim FPGA edition in the forum OSVVM 11 months, 1 week ago
Thanks Jim for the help with MTI version check (18.1 produces a seg-fault with NewID call). Now I have updated to the latest available – 20.1 and I see that seg-fault is resolved. However, during push I get:
<log>
# Time: 1 ns Iteration: 0 Instance: /tb_af_up_dn_counter/u_testcase
# %% Alert FAILURE in OSVVM, Scoreboard Push Index:…[Read more] -
Ajeetha Kumari replied to the topic Generic testControlProc – can this be a pattern? in the forum OSVVM 11 months, 1 week ago
Thanks, aligns with my thoughts. Yes the generator already creates/uses clock/reset procedures.
Regards
Ajeetha -
Jim Lewis replied to the topic Generic testControlProc – can this be a pattern? in the forum OSVVM 11 months, 1 week ago
Depending on what becomes the pattern, it could be a concurrent procedure call (if it encapsulates the entire process), a sequential procedure call (if it only encapsulates most of the process), or as you suggested an entity (but may be more than we need).
Also note that OSVVM’s TbUtilPkg has a CreateClock and a CreateReset
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Jim Lewis replied to the topic Generic testControlProc – can this be a pattern? in the forum OSVVM 11 months, 1 week ago
Some of what is in the ControlProc is pretty standard. Some of it is not.
The main items above that are custom are:
UartScoreboard <= NewID("UART_SB", NUM_UARTS) ;
. . .
osvvm_uart.ScoreboardPkg_Uart.WriteScoreboardYaml(FileName => GetTestName & "_sb_Uart.yml") ;Long term, we should be able to do the UartScoreboard as a constant:
constant…
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Jim Lewis replied to the topic Dissecting the OSVVM AXI Master BFM in the forum OSVVM 11 months, 1 week ago
> I can see that the scripts use the explicit name of the file for analyze and run_test TCL commands. However, it is also possible to just do a file search and with the filenames in a list, iterate over the list and call analyze or run_test for each of them.
> Why isn’t it done in this way?
It comes down to testing philosophy. I see the s…[Read more]
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Jim Lewis replied to the topic Running AXI4 Simulation from OSVVM Libraries repository in the forum OSVVM 11 months, 1 week ago
The following are primary API commands. Note that library sets the
– library []
– Make LibraryName found in library directory specified by path the active library.
– Create the LibraryName if it does not exist.
– If path is not specified, use the library directory specified by SetLibraryDirectory.
– analyze [/] [options]…[Read more] -
Hassan replied to the topic Dissecting the OSVVM AXI Master BFM in the forum OSVVM 11 months, 1 week ago
I can see that the scripts use the explicit name of the file for analyze and run_test TCL commands. However, it is also possible to just do a file search and with the filenames in a list, iterate over the list and call analyze or run_test for each of them.
Why isn’t it done in this way?
Also, I was expecting to see a whole lot of commands that…[Read more]
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