Jim Lewis

There was. It was removed as it did not work in one of the vendors. I will need to add it back.

Hi Hassan
The AXI interface has a number of optional signals. How to handle these is the interesting proposition. Their width can be configured. The current VC leaves them unconstrained. This means they have to be connected, even if unused and connected to a 0 width std_logic_vector(0 downto 1).

That said, can their impact be minimized.…[Read more]

This is just the VHDL signal use model when reading it after assigning it in a process. Since RTL does not allow wait for 0 ns, it is limited to testbenches.

Verilog assignments have the same sort of issue.

Hi Ajeetha,
Next time please provide a complete testable example, such as I have provided below. Try running this.

library osvvm ;
context osvvm.OsvvmContext ;
use osvvm.ScoreboardPkg_int.all ;

ControlProc :…[Read more]

Do:
stim : process
begin
SB_int <= NewID("COUNT_SB");
wait for 0 ns; -- let SB_int to update
report ("SB_int: " & integer'image(SB_int.Id));
i_up_or_down <= '0';
push(SB_int, 2);
. . .

Hi Ajeetha,
Nope. That is integer’left.

Put a “wait for 0 ns” before reading the signal. That allows a simulation cycle to go by and the signal to update to the value assigned by NewID.

Jim

Depending on what becomes the pattern, it could be a concurrent procedure call (if it encapsulates the entire process), a sequential procedure call (if it only encapsulates most of the process), or as you suggested an entity (but may be more than we need).

Also note that OSVVM’s TbUtilPkg has a CreateClock and a CreateReset

Some of what is in the ControlProc is pretty standard. Some of it is not.
The main items above that are custom are:
UartScoreboard <= NewID("UART_SB", NUM_UARTS) ;
. . .
osvvm_uart.ScoreboardPkg_Uart.WriteScoreboardYaml(FileName => GetTestName & "_sb_Uart.yml") ;

Long term, we should be able to do the UartScoreboard as a constant:
constant…[Read more]

> I can see that the scripts use the explicit name of the file for analyze and run_test TCL commands. However, it is also possible to just do a file search and with the filenames in a list, iterate over the list and call analyze or run_test for each of them.

> Why isn’t it done in this way?

It comes down to testing philosophy. I see the s…[Read more]

The following are primary API commands. Note that library sets the

– library []
– Make LibraryName found in library directory specified by path the active library.
– Create the LibraryName if it does not exist.
– If path is not specified, use the library directory specified by SetLibraryDirectory.
– analyze [/] [options]…[Read more]

Thanks. I will get the updates in OSVVM scripting.

Hi Brad,
Did you add “global aldec” or “global ALDEC”? Your note above seemed to indicate that it is lower case. OTOH, the error messages are referencing an upper case $ALDEC. I should note if I do “puts $aldec” it works. If I do “puts $ALDEC” it does not work.

There is no “$aldec” in $PATH_TO_SIM_DIR right?

Cheers,
Jim

Currently to get the HTML and JUnit XML reports you must use OSVVM scripting. The problem is that both the scripts and the VHDL code writes to the files.

I use alerts in protocol checkers. If a VC receives a transaction done event when a transaction is not active, that is an alert and not an affirmation – think of the older intel X86 interfaces that used the signal nRdy to indicate a transaction is complete – receiving a stray nRdy is a bad thing.

More direct control refers to output formatting when a check passes or fails.

> From my knowledge, VHDL already contains resolution functions for scenarios where something has multiple drivers. So are new functions required to resolve records with multiple drivers?
VHDL has a resolution function for std_ulogic named resolved. Its non-driving element is ‘Z’. Its default value is ‘U’. If you do not initialize it, then…[Read more]

Hi Brad,
Cool. If we end up needing that, it will be added. However, that said, I am curious as to why it is needed. Normally variable expansion is done in the calling scripts.

So if I do:
SetExtendedSimulateOptions "-dbg -t 0 -ieee_nowarn -dataset {./sim} -datasetname {sim} -loadvhpi $aldec/bin/aldec_matlab_cosim.dll:ml2hdl"

Then I…[Read more]

Hi Ajeetha,
Since you are creating a code generator I recommend that when it uses ScoreboardIDType that it always uses a selected path that includes the library and package as that way if people using the generated code add to it they too will not have any issues – and they will have a safe example from which to template.

If your generator…[Read more]

Hi Ajeetha,
WRT scoreboards, there are no known issues with either GHDL or NVC.

There is a subtle VHDL thing with using or referencing multiple generic packages that declare a type – such as ScoreboardIDType that is declared in ScoreboardGenericPkg.

If you reference only one Scoreboard package instance, such as ScoreboardPkg_slv, then the…[Read more]

The DelayCoverage models divide a transfer into segments that are BurstLength in length. For beats (transfers within that burst length) there is BeatDelay between each item transferred on the interface. After BurstLength there is BurstDelay before the next item is transferred. Each of BurstLength, BeatDelay, and BurstLength is randomized using…[Read more]