Jim Lewis

> Does OsvvmLibraries contain test plan that describes what specific tests exist?

I have not published one. I have it in my notebook. It would be a good idea to publish it.

> These TCL commands TestSuite, RunTest and SkipTest appear to be defined in the OsvvmProjectScripts.tcl. There are other commands like build, analyze, include for which…[Read more]

Getting back to your question again, if the test cases are compiled, OSVVM can do

LinkLibraryDirectory ; # Make libraries in the OSVVM library directory visible - not necessary after a build
ListLibraries ; # Lists the libraries OSVVM knows about.
vdir -lib <libraryName> ; # Questa/ModelSim & RivieraPRO/ActiveHDL
library…[Read more]

As an addendum to my last comment …
Note there are shortcuts when calling the scripts via include/build. So the following are equivalent:
build $OsvvmLibraries/OsvvmLibraries.pro
build $OsvvmLibraries/OsvvmLibraries ; # Automatically adds .pro extension
build $OsvvmLibraries ; # looks for OsvvmLibraries.pro or…[Read more]

> With VUnit I can pass a switch to the run.py and get list of tests and then run a specific test. I can choose whether to run it in in GUI mode or batch mode. How can I do that with OSVVM AXI4 tests?

> I can see that with OSVVM, each test is a different architecture of the same entity. But can OSVVM list tests like we do with VUnit and then run…[Read more]

The scripting provided as part of OSVVM is hierarchical. If we take a look at $OsvvmLibraries/OsvvmLibraries.pro, we will see:
include ./osvvm/osvvm.pro
include ./Common/Common.pro

if {[DirectoryExists UART]} {
include ./UART/UART.pro
}
if {[DirectoryExists AXI4]} {
include ./AXI4/AXI4.pro
}
if {[DirectoryExists DpRam]} {
include…[Read more]

OSVVM connects the transaction interface (a signal of a record type) directly connects the test sequencer (our examples use the name TestCtrl) to the verification component – each have ports of the same type – AddressBusRecType for MM/address bus type interfaces. All the information is passed in the record data structure – with dedicated fields…[Read more]

Yes. OSVVM calls this capability our Model Independent Transaction Library. It defines a transaction API and a transaction interface. The transaction interface is a record that is intended to be a superset of the information a transaction will need. The transaction API handles everything a transaction needs to do to send a transaction and…[Read more]

Hi Jake,
Sorry. In my last post I thought maybe there was a 2024.03 for Siemens.

I am testing on Windows. My contact at Siemens says there are issues with running OSVVM in Visualizer version 2024.01. So at least for Windows we are waiting for the next release of Visualizer. I understand that these issues are not a problem on the Linux…[Read more]

Short answer is yes. OSVVM VC (including AXI4) use items from the other OSVVM libraries, so you will need to compile those.
To build OSVVM, I recommend using the the OSVVM-Scripts. Then in VUnit you can map the OSVVM libraries.

OSVVM VC report errors against the OSVVM AlertLogPkg. You will either want to use the OSVVM AlertLogPkg in your…[Read more]

> 1. Do the OSVVM VC for these AMBA busses support all parts of the specification for these busses?
That is certainly the intent.

> 2. What is the difference between the OSVVM VC for these busses and the ones from UVVM?
I will only talk about the OSVVM VC as I don’t pay attention to the UVVM VC.

All OSVVM VC use the OSVVM Model Independent…[Read more]

Hi Jake,
Are you running on Linux or Windows? Currently I am testing on Windows. My contact at Siemens says there are some issues with running OSVVM in Visualizer in 2024.01. As a result, I had not put the effort into running it just yet. However I have not heard from him about 2024.03. I will check.

Best Regards,
Jim

What does your interface look like? Are there any control signals? When do you receive a result – immediately or several clocks later? What operations does it support? What is the set of values you intend to apply to your ALU to verify it?

2024.03a addresses this issue – specifically when running interactively, EndSimulation will not be called.

Hi Jeremy
Currently OSVVM is doing quit -sim when a simulation ends in error. This unfortunately is necessary to close the transcript file.

A change is coming to not do this when running interactive

Jim

Hi Mahmoud,
Please see test case OsvvmLibraries/AXI4/Axi4/TestCases/TbAxi4_ReleaseAcquireManager1.vhd

Best Regards,
Jim

For the next release of OSVVM, I have added an AlertLogID input to SafeResize and all of the OSVVM VC specify the ID on the call to SafeResize. I also updated the error message to be of the following form:

Alert ERROR in AxiManager_1, SafeResize: value changed on resize. Original value: 01AF, Resized value: AF

Hopefully this will…[Read more]

Step 1: If you have complex clock domain crossings, you probably need a clock domain crossing tool. Especially to find anything that might loop back.
Step 2: Use your directed cases to explore the relationships you understand.
Step 3: Add jitter to your clock (or clocks depending on the number of clock domains you have) so that your…[Read more]

Hi Joseph,
This is coming from the call to SafeResize that is inside of OSVVM verification components. What it is telling you is that the testbench put a value with more one’s on the left hand side of it in the call to a transaction, such as Write, Read, or Send, than is used by the verification component.

The error will happen when you call…[Read more]

Hi Jake,
Just checked the Questa command reference manual. Good catch. It is an easy fix.
In the file, VendorScripts_Siemens.tcl, all of the specialization is done. In there
the analyze for Verilog/SystemVerilog is:
`tcl
proc vendor_analyze_verilog {LibraryName FileName args} {
set AnalyzeOptions [concat [CreateVerilogLibraryParams “-l…[Read more]