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Hi Jim,I mailed the log files to your Synthworks Mail.Kind regardsSebastian

Sure, it is easy.   Sequences imply history.   We create history explicitly just like RTL – by using clocked processes / flip-flops.   Once you have history, this is just a simple cross product of selected current values and two previous values.   WRT sampling, in OSVVM, we trigger on transaction completion using an explicit call to…

Hi Jim, Many thanks for your answer. My problem is that i have tried every which way to get things to compile and i always get errors.My scoreboard generic package is defined like this now in a seperate design unit (i.e. a VHDL file):library IEEE;use IEEE.STD_LOGIC_1164.ALL;library osvvm;–use osvvm.OsvvmContext;use OSVVM.ScoreboardGenericPkg;use…[Read more]

Hi Torsten,In the IEEE VHDL-2008, there is only numeric_std_unsigned.   There is no “signed” package.   Jim

Hi Jim,I found in the ALDEC documentation how to merge the functional coverage using the acdb edit command.Example:## Merge functional coverage from TSSPWIPacdb edit -i "$dsn/src/Unit Test/unittest.acdb" -move -merge instance /unittest/TSSPWIP/TC* /unittest/TSSPWIP/TC3RecvErrBest regards,Jorge

Thanks, I get far better results with your workaround. If we change the seed function, we could look what kind of hash functions are used for dictionary types in languages like python. I assume, they use functions which are not cryptographic secure, but have a good uniform distribution and are very fast. But you are right, with such a change, the…[Read more]

Hi Reuven,PathTail is intended to extract a component instance label from a PathName.   For the string representation of a variable, signal, constant, or even entity name, you can indeed just use simple_name.  I will update PathTail in the next revision so that it does not assume the name ends in a “:” and will return what you were…[Read more]

Hi Jim,I would like positive acknowledge in the Report Status. My end client is doing DO-254 with OSVVM and my company is struggling to integrate the two.Thanks,Tim

I test with QuestaSim 10.5b so if you have the compile order correct, you should be fine.How did you compile it?   Did you use the osvvm.do file?   See:  https://github.com/OSVVM/OSVVM/blob/master/osvvm.doDid you use the directions in the OSVVM_release_notes.pdf?   See:  https://github.com/OSVVM/OSVVM/blob/master/doc/osvvm_release_notes.pdfI note…[Read more]

Hi Eilert,In the 2008 standard it says:An implementation shall choose a representation for all floating-point types except for universal_real that conforms either to IEEE Std 754-1985 or to IEEE Std 854-1987; in either case, a minimum representation size of 64 bits is required for this chosen representation.I think this changed before 2008,…[Read more]

Hi Jim,I hoped that there’s some solution using the range notation like you showed:With named association, you can also do the following:
     A <= RndA.DistSlv((0=>5, 1 to 14 =>1, 15=>5), A'length) ;I just didn’t expect it to be so straight simple, since the defined type is self defined. You mentioned integer_vectors somewhere else. Are these…[Read more]

Hi Roger,I just did a code review regarding AtLeast.  Looking at the code, the AtLeast value is the maximum of the one specified by AddBins (the way I usually show to enter it) and the value specified by GenBin (also specified by a first integer value – but then also requires at least 4 parameters be used).   Hence, if you specify both, you may be…[Read more]

That unfortunately is a known bug.   10.4 brought some new cool features, but some how broke for the scoreboard in a way that I could not figure out how to work around.   If you are just working with the primary releases, the following versions also exhibit the issue:  10.4, 10.4a, 10.4b, 10.4c.   10.3 was fine.   10.4d and 10.5 are fine. The…[Read more]

Good catch.   I updated the source document.  Thanks.