OS-VVM in general
Announcing OSVVM™ 2015.03
OSVVM 2015.03 is a minor release that updates only AlertLogPkg. All other packages remain unchanged. In AlertLogPkg, added AlertIfEqual, AlertIfNotEqual, and AlertIfDiff (file). Added ReadLogEnables to initialize LogEnables from a file. Added ReportNonZeroAlerts. Added PathTail to extract an instance name from MyEntity’PathName. Added ReportLogEnables and GetAlertLogName. See AlertLogPkg_Use... »
Announcing OSVVM™ 2015.01
OSVVM 2015.01 is a major release that introduces AlertLogPkg. AlertLogPkg adds Alert and verbosity control procedures that are a powerful replacement for assert statements. All OSVVM packages have replaced asserts with alerts. VHDL assert statements have a limited form of an alert and verbosity control. Through a simulator, you can set an assertion level that will stop a simulation. Through a simu... »
OSVVM™ 2014.07a: Protected Types, Initialized Pointers, and Memory Leaks
I have just posted release 2014.07a. There are no new features in this release. It fixes memory leaks. The first (and biggest) issue is in the deallocate procedure in CoveragePkg for CovPType. The Name of each coverage bin is never deallocated when deallocate is called. If you called deallocate during your testing process, the space allocated for the bin names was never given back. Hence, if you a... »
OSVVM™ 2014.07 Preview and Questions
Over the summer I have been working on the next set of revisions for OSVVM. One of the new features allows a name to be specified for each bin. The name is specified in calls to AddBins and AddCross. If a name is present, calls to WriteBin will print it. One motivation for a bin name is to correlate a requirement with it being tested (PASSED) or not tested (FAILED). Hence the output of WriteBin is... »
OSVVM™ Webinar and World Tour Dates
Webinar Thursday June 26, 2014 OSVVM provides functional coverage and randomization utilities that layer on top of your transaction level modeling (tlm) based VHDL testbench. Using these you can create either basic Constrained Random tests or more advanced Intelligent Coverage based Random tests. This simplified approach allows you to utilize advanced randomization techniques when you need them an... »
Announcing OSVVM Release 2014.01
OSVVM release 2014.01 is now available at OSVVM Downloads. Note that starting with this release, I have separated the examples from the release of the library. Message handling is now handled by separate package, MessagePkg. MessagePkg must be compiled before CoveragePkg. Suggested compile order: MessagePkg.vhd SortListPkg_int.vhd RandomBasePkg.vhd RandomPkg.vhd CoveragePkg.vhd What’s new in... »
OSVVM World Tour
In conjunction with FirstEDA, I taught the first two European sessions of our OSVVM and Transaction Level Modeling (TLM) focused Advanced VHDL Testbenches and Verification class. We had attendees from many of the major European System Companies who design and verify programmable devices (FPGAs). The skill level of the delegates was impressive and made teaching one of my favorite classes just that ... »